Commit cfda6bd2 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Tom Rini

mips: move CONFIG_MIPS{32, 64} definition to config.mk

All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.

CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.
Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
parent 026f9cf2
......@@ -11,9 +11,7 @@
# Note: Toolchains with binutils prior to v2.16
# are no longer supported by U-Boot MIPS tree!
#
MIPSFLAGS := -march=mips32r2
PLATFORM_CPPFLAGS += $(MIPSFLAGS)
PLATFORM_CPPFLAGS += -DCONFIG_MIPS32 -march=mips32r2
PLATFORM_CPPFLAGS += -mabi=32 -DCONFIG_32BIT
ifdef CONFIG_SYS_BIG_ENDIAN
PLATFORM_LDFLAGS += -m elf32btsmip
......
......@@ -11,9 +11,7 @@
# Note: Toolchains with binutils prior to v2.16
# are no longer supported by U-Boot MIPS tree!
#
MIPSFLAGS = -march=mips64
PLATFORM_CPPFLAGS += $(MIPSFLAGS)
PLATFORM_CPPFLAGS += -DCONFIG_MIPS64 -march=mips64
PLATFORM_CPPFLAGS += -mabi=64 -DCONFIG_64BIT
ifdef CONFIG_SYS_BIG_ENDIAN
PLATFORM_LDFLAGS += -m elf64btsmip
......
......@@ -502,8 +502,8 @@ Active m68k mcf547x_8x - freescale m548xevb
Active microblaze microblaze - xilinx microblaze-generic microblaze-generic - Michal Simek <monstr@monstr.eu>
Active mips mips32 - - qemu-mips qemu_mips qemu-mips:SYS_BIG_ENDIAN Vlad Lungu <vlad.lungu@windriver.com>
Active mips mips32 - - qemu-mips qemu_mipsel qemu-mips:SYS_LITTLE_ENDIAN -
Active mips mips32 - imgtec malta malta malta:MIPS32,SYS_BIG_ENDIAN Paul Burton <paul.burton@imgtec.com>
Active mips mips32 - imgtec malta maltael malta:MIPS32,SYS_LITTLE_ENDIAN Paul Burton <paul.burton@imgtec.com>
Active mips mips32 - imgtec malta malta malta:SYS_BIG_ENDIAN Paul Burton <paul.burton@imgtec.com>
Active mips mips32 - imgtec malta maltael malta:SYS_LITTLE_ENDIAN Paul Burton <paul.burton@imgtec.com>
Active mips mips32 - micronas vct vct_platinum vct:VCT_PLATINUM -
Active mips mips32 - micronas vct vct_platinum_onenand vct:VCT_PLATINUM,VCT_ONENAND -
Active mips mips32 - micronas vct vct_platinum_onenand_small vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE -
......
......@@ -12,7 +12,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_DBAU1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
......
......@@ -12,7 +12,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
#define CONFIG_XWAY_SWAP_BYTES
......
......@@ -12,7 +12,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_PB1X00 1
#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
......
......@@ -12,7 +12,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 /* MIPS32 CPU core */
#define CONFIG_QEMU_MIPS
#define CONFIG_MISC_INIT_R
......
......@@ -12,7 +12,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS64 /* MIPS64 CPU core */
#define CONFIG_QEMU_MIPS
#define CONFIG_MISC_INIT_R
......
......@@ -25,7 +25,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
......
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