Commit e03f3169 authored by Wolfgang Denk's avatar Wolfgang Denk

Drop support for CONFIG_SKIP_RELOCATE_UBOOT

For ARM systems, before ELF relocation was introduced,
CONFIG_SKIP_RELOCATE_UBOOT coul be used to prevent *COPYING* the
U-Boot image from whereever it was loaded to it's link address
(CONFIG_SYS_TEXT_BASE).  The name was badly chosen, as no relocation
was performed at all, it was just a memcpy().

With ELF relocation, this does not work like that any more, and
related boards need to be fixed anyway.  So don't keep this relict any
longer.
Signed-off-by: default avatarWolfgang Denk <wd@denx.de>
Tested-by: default avatarHeiko Schocher <hs@denx.de>
Tested-by: default avatarReinhard Meyer <u-boot@emk-elektronik.de>
parent a9aa3926
......@@ -1067,7 +1067,6 @@ mx31pdk_nand_config : unconfig
echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h; \
else \
echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
fi
@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
......
......@@ -2836,19 +2836,17 @@ Low Level (hardware related) configuration options:
globally (CONFIG_CMD_MEM).
- CONFIG_SKIP_LOWLEVEL_INIT
- CONFIG_SKIP_RELOCATE_UBOOT
[ARM only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
[ARM only] If these variables are defined, then
certain low level initializations (like setting up
the memory controller) are omitted and/or U-Boot does
not relocate itself into RAM.
Normally these variables MUST NOT be defined. The
only exception is when U-Boot is loaded (to RAM) by
some other boot loader or by a debugger which
performs these initializations itself.
Normally this variable MUST NOT be defined. The only
exception is when U-Boot is loaded (to RAM) by some
other boot loader or by a debugger which performs
these initializations itself.
- CONFIG_PRELOADER
Modifies the behaviour of start.S when compiling a loader
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.
......
......@@ -215,7 +215,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -262,7 +261,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......@@ -295,9 +293,7 @@ jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
......
......@@ -281,7 +281,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -328,7 +327,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
......@@ -399,9 +397,7 @@ _nand_boot: .word nand_boot
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
......
......@@ -190,7 +190,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -217,7 +216,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -236,7 +236,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -263,7 +262,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -227,7 +227,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -254,7 +253,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -204,7 +204,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -251,7 +250,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......@@ -286,9 +284,7 @@ _nand_boot_ofs:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
......
......@@ -196,7 +196,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -223,7 +222,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -194,7 +194,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -221,7 +220,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -189,7 +189,6 @@ relocate_code:
stack_setup:
mov sp, r4
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
......@@ -259,7 +258,6 @@ clbss_l:str r2, [r0] /* clear loop... */
cmp r0, r1
bne clbss_l
#endif /* #ifndef CONFIG_PRELOADER */
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
/*
* We are done. Do not return, instead branch to second part of board
......@@ -269,9 +267,7 @@ jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
......
......@@ -320,7 +320,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -347,7 +346,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -207,7 +207,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -234,7 +233,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -251,7 +251,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
stmfd sp!, {r0-r12}
copy_loop:
ldmia r0!, {r3-r5, r7-r11} /* copy from source address [r0] */
......@@ -300,7 +299,6 @@ fixnext:
cmp r2, r3
blo fixloop
#endif /* #ifndef CONFIG_PRELOADER */
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......@@ -332,9 +330,7 @@ _start_oneboot_ofs
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
......
......@@ -179,7 +179,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -218,7 +217,6 @@ vector_copy_loop:
stmia r1!, {r3-r10}
cmp r0, r2
blo vector_copy_loop
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -183,7 +183,6 @@ stack_setup:
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
......@@ -210,7 +209,6 @@ fixloop:
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
......
......@@ -31,7 +31,6 @@
* so we MUST NOT initialize critical regs like mem-timing ...
*/
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
/*
* High Level Configuration Options
......
......@@ -42,7 +42,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -44,7 +44,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -69,8 +69,6 @@
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
......
......@@ -49,7 +49,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -47,7 +47,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -43,7 +43,6 @@
#ifndef CONFIG_SYS_USE_BOOT_NORFLASH
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif
/*
......
......@@ -47,7 +47,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -44,7 +44,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -68,8 +68,6 @@
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
......
......@@ -29,7 +29,6 @@
#define CONFIG_VPAC270 1 /* Toradex Colibri PXA270 board */
#undef BOARD_LATE_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ
#undef CONFIG_SKIP_LOWLEVEL_INIT
......
......@@ -28,7 +28,6 @@
#ifdef CONFIG_CPUAT91_RAM
#define CONFIG_SKIP_LOWLEVEL_INIT 1
#define CONFIG_SKIP_RELOCATE_UBOOT 1
#else
#define CONFIG_BOOTDELAY 1
#endif
......
......@@ -69,8 +69,6 @@
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
......
......@@ -41,7 +41,6 @@
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_HZ 1000
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CONFIG_SYS_TEXT_BASE 0xc1080000
/*
......
......@@ -24,7 +24,6 @@
#define DAVINCI_DM355EVM
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_DISPLAY_CPUINFO
......
......@@ -23,7 +23,6 @@
#define DAVINCI_DM355LEOPARD
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_DISPLAY_CPUINFO
......
......@@ -24,7 +24,6 @@
#define DAVINCI_DM365EVM
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 3rd stage loader */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
#define CONFIG_SYS_CONSOLE_INFO_QUIET
......
......@@ -24,7 +24,6 @@
#define DAVINCI_DM6467EVM
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/* SoC Configuration */
#define CONFIG_ARM926EJS /* arm926ejs CPU */
......
......@@ -133,7 +133,6 @@
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
#endif
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_HW_ECC
......@@ -143,10 +142,8 @@
#elif defined(CONFIG_SYS_USE_NOR)
#ifdef CONFIG_NOR_UART_BOOT
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#else
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
#endif
#define CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_SYS_NO_FLASH
......
......@@ -88,7 +88,6 @@
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
......
......@@ -83,7 +83,6 @@
#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
......
......@@ -122,7 +122,6 @@
#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#define CONFIG_SYS_NAND_BASE 0x02000000
#define CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
......@@ -131,10 +130,8 @@
#elif defined(CONFIG_SYS_USE_NOR)
#ifdef CONFIG_NOR_UART_BOOT
#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
#else
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
#endif
#define CONFIG_ENV_IS_IN_FLASH
#undef CONFIG_SYS_NO_FLASH
......
......@@ -32,7 +32,6 @@
* so we MUST NOT initialize critical regs like mem-timing ...
*/
#define CONFIG_SKIP_LOWLEVEL_INIT 1
#undef CONFIG_SKIP_RELOCATE_UBOOT
/*
* High Level Configuration Options
......
......@@ -39,7 +39,6 @@
* we use lowlevel_init (!CONFIG_SKIP_LOWLEVEL_INIT) to remedy that problem.
*/
#undef CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT 1
/*
* High Level Configuration Options
......
......@@ -53,8 +53,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
/* NOR flash without preloader */
#define CONFIG_SYS_LONGHELP
......
......@@ -31,7 +31,6 @@
* so we MUST NOT initialize critical regs like mem-timing ...
*/
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
/*
* High Level Configuration Options
......
......@@ -48,7 +48,6 @@
#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_MISC_INIT_R /* Call misc_init_r */
#define CONFIG_ARCH_CPU_INIT
......
......@@ -73,8 +73,6 @@
#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
#else
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
......
......@@ -47,7 +47,6 @@
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
#endif
/*
......
......@@ -28,7 +28,6 @@
/* High Level Configuration Options */
#define CONFIG_MX51 /* in a mx51 */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_MX5_HCLK 24000000
#define CONFIG_SYS_MX5_CLK32 32768
......
......@@ -119,9 +119,6 @@
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*#define CONFIG_SKIP_RELOCATE_UBOOT*/
/*#define CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Partitions (mtdparts command line support)
*/
......
......@@ -48,7 +48,6 @@
#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_ARCH_CPU_INIT
......
......@@ -152,7 +152,6 @@
#define CONFIG_INITRD_TAG 1
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -161,7 +161,6 @@
#define CONFIG_INITRD_TAG 1
#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_USER_LOWLEVEL_INIT 1
/*
......
......@@ -47,7 +47,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -42,7 +42,6 @@
* so we MUST NOT initialize critical regs like mem-timing ...
*/
#undef CONFIG_SKIP_LOWLEVEL_INIT /* define for developing */
#undef CONFIG_SKIP_RELOCATE_UBOOT /* define for developing */
#define CONFIG_SYS_TEXT_BASE 0x0
/*
......
......@@ -40,8 +40,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SKIP_RELOCATE_UBOOT
/* input clock of PLL: has 24MHz input clock at S5PC110 */
#define CONFIG_SYS_CLK_FREQ_C110 24000000
......
......@@ -54,7 +54,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -34,7 +34,6 @@
*/
#define CONFIG_INFERNO /* we are using the inferno bootldr */
#define CONFIG_SKIP_LOWLEVEL_INIT 1
#undef CONFIG_SKIP_RELOCATE_UBOOT
/*
* High Level Configuration Options
......
......@@ -40,8 +40,6 @@
#define CONFIG_S3C64XX 1 /* in a SAMSUNG S3C64XX Family */
#define CONFIG_SMDK6400 1 /* on a SAMSUNG SMDK6400 Board */
#define CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_PERIPORT_REMAP
#define CONFIG_PERIPORT_BASE 0x70000000
#define CONFIG_PERIPORT_SIZE 0x13
......
......@@ -45,8 +45,6 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#undef CONFIG_SKIP_RELOCATE_UBOOT
/* input clock of PLL: SMDKC100 has 12MHz input clock */
#define CONFIG_SYS_CLK_FREQ 12000000
......
......@@ -63,7 +63,6 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SKIP_RELOCATE_UBOOT
/*
* Hardware drivers
......
......@@ -195,8 +195,6 @@
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_GBL_DATA_OFFSET)
#undef CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_BOARD_EARLY_INIT_F
/* 166 MHz DDR RAM */
......
......@@ -30,7 +30,6 @@
#define CONFIG_SYS_TEXT_BASE 0x0
#undef BOARD_LATE_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ
#undef CONFIG_SKIP_LOWLEVEL_INIT
......
......@@ -45,7 +45,6 @@
#undef CONFIG_MMC
#define BOARD_LATE_INIT 1
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* we will never enable dcache, because we have to setup MMU first */
......
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