Commit e1e332c8 authored by Simon Glass's avatar Simon Glass

dm: spi: Correct status register access width

The status register on ICH9 is a single byte, so use byte access when
writing to it, to avoid updating the control register also.
Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
Reviewed-by: default avatarBin Meng <bmeng.cn@gmail.com>
Reviewed-by: default avatarJagan Teki <jteki@openedev.com>
parent a4520022
......@@ -411,6 +411,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev_get_parent(dev);
struct ich_spi_platdata *plat = dev_get_platdata(bus);
struct ich_spi_priv *ctlr = dev_get_priv(bus);
uint16_t control;
int16_t opcode_index;
......@@ -477,7 +478,10 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
if (ret < 0)
return ret;
ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
if (plat->ich_version == 7)
ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
else
ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
spi_setup_type(trans, using_cmd ? bytes : 0);
opcode_index = spi_setup_opcode(ctlr, trans);
......
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