Commit efbb3d49 authored by Stephen Warren's avatar Stephen Warren Committed by Tom Warren

ARM: tegra: p2371-2180: A03 board PMIC config update

Rev A03 of P2180 requires some PMIC programming adjustments, yet the
PMIC's own OTP has not been updated. Consequently, U-Boot must make
these changes itself.

NVIDIA's syseng team has confirmed that these changes can be enabled on
all board revisions without issue.
Signed-off-by: 's avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: 's avatarTom Warren <twarren@nvidia.com>
parent 49626ea8
......@@ -30,6 +30,28 @@ void pin_mux_mmc(void)
ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
/* Disable LDO4 discharge */
ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1);
if (ret) {
printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret);
} else {
val &= ~BIT(1); /* ADE */
ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret);
}
/* Set MBLPD */
ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
if (ret) {
printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
} else {
val |= BIT(6); /* MBLPD */
ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
if (ret)
printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
}
}
/*
......
......@@ -13,6 +13,8 @@
#define MAX77620_I2C_ADDR 0x78
#define MAX77620_I2C_ADDR_7BIT 0x3C
#define MAX77620_CNFGGLBL1_REG 0x00
#define MAX77620_SD0_REG 0x16
#define MAX77620_SD1_REG 0x17
#define MAX77620_SD2_REG 0x18
......
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