Commit f168228e authored by Peng Fan's avatar Peng Fan Committed by Jason Liu

MLK-16496-1 imx8qm/qxp: set usdhc clock to 400M

Set usdhc clock to 400M. When enabling HS400 ES, DDR EN is enabled,
if we still have input clock as 200M, the real output clock will be 100M.

So set clock to 400M to get real 200M output when enabling HS400/ES.
Signed-off-by: 's avatarPeng Fan <peng.fan@nxp.com>
Reviewed-by: 's avatarYe Li <ye.li@nxp.com>
parent dd36c1c1
......@@ -254,7 +254,7 @@ void init_clk_usdhc(u32 index)
sc_err_t err;
sc_ipc_t ipc;
sc_pm_clock_rate_t actual = 200000000;
sc_pm_clock_rate_t actual = 400000000;
ipc = gd->arch.ipc_channel_handle;
......@@ -267,8 +267,8 @@ void init_clk_usdhc(u32 index)
return;
}
if (actual != 200000000)
debug("Actual rate for SDHC_%d is %d\n", index, actual);
if (actual != 400000000)
printf("Actual rate for SDHC_%d is %d\n", index, actual);
err = sc_pm_clock_enable(ipc, usdhcs[index], SC_PM_CLK_PER, true, false);
if (err != SC_ERR_NONE) {
......
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