Commit f1df81c4 authored by Gerald Kerma's avatar Gerald Kerma Committed by Luka Perkov

arm: kirkwood: add ZyXEL NSA310S device

This patch add ZyXEL NSA310S 1-Bay Media Server

The ZyXEL NSA310S device is a Kirkwood based NAS:

- SoC: Marvell 88F6702 1000Mhz
- SDRAM memory: 256MB DDR2 400Mhz
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: 128MB
- 1 Power button
- 1 Power LED (blue)
- 4 Status LED (green)
- 1 Copy/Sync button
- 1 Reset button
- 1 SATA II port
- 2 USB 2.0 ports (front and back)
- Smart fan
Signed-off-by: default avatarGerald Kerma <dreagle@doukki.net>
Signed-off-by: default avatarTony Dinh <mibodhi@gmail.com>
Signed-off-by: default avatarLuka Perkov <luka.perkov@sartura.hr>
parent 76b391cd
......@@ -49,6 +49,9 @@ config TARGET_GOFLEXHOME
config TARGET_NAS220
bool "BlackArmor NAS220"
config TARGET_NSA310S
bool "Zyxel NSA310S"
endchoice
config SYS_SOC
......@@ -69,5 +72,6 @@ source "board/raidsonic/ib62x0/Kconfig"
source "board/Seagate/dockstar/Kconfig"
source "board/Seagate/goflexhome/Kconfig"
source "board/Seagate/nas220/Kconfig"
source "board/zyxel/nsa310s/Kconfig"
endif
#
# Copyright (C) 2015
# Gerald Kerma <dreagle@doukki.net>
# Tony Dinh <mibodhi@gmail.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
if TARGET_NSA310S
config SYS_BOARD
default "nsa310s"
config SYS_VENDOR
default "zyxel"
config SYS_CONFIG_NAME
default "nsa310s"
endif
NSA310S BOARD
M: Gerald Kerma <dreagle@doukki.net>
M: Tony Dinh <mibodhi@gmail.com>
M: Luka Perkov <luka.perkov@sartura.hr>
S: Maintained
F: board/zyxel/nsa310s/
F: include/configs/nsa310s.h
F: configs/nsa310s_defconfig
#
# Copyright (C) 2015
# Gerald Kerma <dreagle@doukki.net>
# Tony Dinh <mibodhi@gmail.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
obj-y := nsa310s.o
#
# Copyright (C) 2015
# Gerald Kerma <dreagle@doukki.net>
# Tony Dinh <mibodhi@gmail.com>
#
# SPDX-License-Identifier: GPL-2.0+
#
# Refer to doc/README.kwbimage for more details about how-to
# configure and create kirkwood boot images.
#
# Boot Media configurations
BOOT_FROM nand
NAND_ECC_MODE default
NAND_PAGE_SIZE 0x0800
# Configure RGMII-0 interface pad voltage to 1.8V
DATA 0xFFD100e0 0x1b1b1b9b
DATA 0xFFD01400 0x43010c30
DATA 0xFFD01404 0x39543000
DATA 0xFFD01408 0x22125451
DATA 0xFFD0140C 0x00000833
DATA 0xFFD01410 0x0000000C
DATA 0xFFD01414 0x00000000
DATA 0xFFD01418 0x00000000
DATA 0xFFD0141C 0x00000652
DATA 0xFFD01420 0x00000004
DATA 0xFFD01424 0x0000F17F
DATA 0xFFD01428 0x00085520
DATA 0xFFD0147c 0x00008552
DATA 0xFFD01504 0x0FFFFFF1
DATA 0xFFD01508 0x10000000
DATA 0xFFD0150C 0x00000000
DATA 0xFFD01514 0x00000000
DATA 0xFFD0151C 0x00000000
DATA 0xFFD01494 0x00010000
DATA 0xFFD01498 0x00000000
DATA 0xFFD0149C 0x0000E403
DATA 0xFFD01480 0x00000001
DATA 0xFFD20134 0x66666666
DATA 0xFFD20138 0x66666666
DATA 0x0 0x0
/*
* Copyright (C) 2015
* Gerald Kerma <dreagle@doukki.net>
* Tony Dinh <mibodhi@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <miiphy.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/io.h>
#include "nsa310s.h"
DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
mvebu_config_gpio(NSA310S_VAL_LOW, NSA310S_VAL_HIGH,
NSA310S_OE_LOW, NSA310S_OE_HIGH);
/* (all LEDs & power off active high) */
/* Multi-Purpose Pins Functionality configuration */
static const u32 kwmpp_config[] = {
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_GPO,
MPP13_GPIO,
MPP14_GPIO,
MPP15_GPIO,
MPP16_GPIO,
MPP17_GPIO,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GPIO,
MPP21_GPIO,
MPP22_GPIO,
MPP23_GPIO,
MPP24_GPIO,
MPP25_GPIO,
MPP26_GPIO,
MPP27_GPIO,
MPP28_GPIO,
MPP29_GPIO,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config, NULL);
return 0;
}
int board_init(void)
{
/* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
u16 reg;
u16 phyaddr;
char *name = "egiga0";
if (miiphy_set_current_dev(name))
return;
/* read PHY dev address */
if (miiphy_read(name, 0xee, 0xee, (u16 *) &phyaddr)) {
printf("could not read PHY dev address\n");
return;
}
/* set RGMII delay */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, &reg);
reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
/* reset PHY */
if (miiphy_reset(name, phyaddr))
return;
/*
* ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to 88E1318)
* and has an MCU attached to the LED[2] via tristate interrupt
*/
/* switch to LED register page */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_LED_PG);
/* read out LED polarity register */
miiphy_read(name, phyaddr, MV88E1318_LED_POL_REG, &reg);
/* clear 4, set 5 - LED2 low, tri-state */
reg &= ~(MV88E1318_LED2_4);
reg |= (MV88E1318_LED2_5);
/* write back LED polarity register */
miiphy_write(name, phyaddr, MV88E1318_LED_POL_REG, reg);
/* jump back to page 0, per the PHY chip documenation. */
miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
/* set PHY back to auto-negotiation mode */
miiphy_write(name, phyaddr, 0x4, 0x1e1);
miiphy_write(name, phyaddr, 0x9, 0x300);
/* downshift */
miiphy_write(name, phyaddr, 0x10, 0x3860);
miiphy_write(name, phyaddr, 0x0, 0x9140);
}
#endif /* CONFIG_RESET_PHY_R */
/*
* Copyright (C) 2015
* Gerald Kerma <dreagle@doukki.net>
* Tony Dinh <mibodhi@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __NSA310S_H
#define __NSA310S_H
/* low GPIO's */
#define HDD1_GREEN_LED (1 << 16)
#define HDD1_RED_LED (1 << 13)
#define USB_GREEN_LED (1 << 15)
#define USB_POWER (1 << 21)
#define SYS_GREEN_LED (1 << 28)
#define SYS_ORANGE_LED (1 << 29)
#define COPY_GREEN_LED (1 << 22)
#define COPY_RED_LED (1 << 23)
#define PIN_USB_GREEN_LED 15
#define PIN_USB_POWER 21
#define NSA310S_OE_LOW (~(0))
#define NSA310S_VAL_LOW (SYS_GREEN_LED | USB_POWER)
/* high GPIO's */
#define HDD2_GREEN_LED (1 << 2)
#define HDD2_POWER (1 << 1)
#define NSA310S_OE_HIGH (~(0))
#define NSA310S_VAL_HIGH (HDD2_POWER)
/* PHY related */
#define MV88E1318_PGADR_REG 22
#define MV88E1318_MAC_CTRL_PG 2
#define MV88E1318_MAC_CTRL_REG 21
#define MV88E1318_RGMII_TX_CTRL (1 << 4)
#define MV88E1318_RGMII_RX_CTRL (1 << 5)
#define MV88E1318_LED_PG 3
#define MV88E1318_LED_POL_REG 17
#define MV88E1318_LED2_4 (1 << 4)
#define MV88E1318_LED2_5 (1 << 5)
#endif /* __NSA310S_H */
CONFIG_ARM=y
CONFIG_KIRKWOOD=y
CONFIG_TARGET_NSA310S=y
CONFIG_SYS_NS16550=y
CONFIG_SYS_PROMPT="nsa310s => "
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_HUSH_PARSER=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_NAND=y
CONFIG_CMD_PING=y
CONFIG_CMD_USB=y
/*
* Copyright (C) 2015
* Gerald Kerma <dreagle@doukki.net>
* Tony Dinh <mibodhi@gmail.com>
* Luka Perkov <luka.perkov@sartura.hr>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _CONFIG_NSA310S_H
#define _CONFIG_NSA310S_H
/* high level configuration options */
#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */
#define CONFIG_KW88F6192 1 /* SOC Name */
#define CONFIG_KW88F6702 1 /* SOC Name */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
/* add target to build it automatically upon "make" */
#define CONFIG_BUILD_TARGET "u-boot.kwb"
/* compression configuration */
#define CONFIG_BZIP2
#define CONFIG_LZMA
/* commands configuration */
#define CONFIG_SYS_NO_FLASH /* declare no flash (NOR/SPI) */
#define CONFIG_SYS_MVFS
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_IDE
#define CONFIG_CMD_MII
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
*/
#include "mv-common.h"
/* environment variables configuration */
#ifdef CONFIG_CMD_NAND
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SECT_SIZE 0x20000
#else
#define CONFIG_ENV_IS_NOWHERE
#endif
#define CONFIG_ENV_SIZE 0x20000
#define CONFIG_ENV_OFFSET 0xe0000
/* default environment variables */
#define CONFIG_BOOTCOMMAND \
"setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \
"ubi part root; " \
"ubifsmount ubi:rootfs; " \
"ubifsload 0x800000 ${kernel}; " \
"ubifsload 0x700000 ${fdt}; " \
"ubifsumount; " \
"fdt addr 0x700000; fdt resize; fdt chosen; " \
"bootz 0x800000 - 0x700000"
#define CONFIG_MTDPARTS \
"mtdparts=orion_nand:" \
"0xe0000@0x0(uboot)," \
"0x20000@0xe0000(uboot_env)," \
"0x100000@0x100000(second_stage_uboot)," \
"-@0x200000(root)\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=console=ttyS0,115200\0" \
"mtdids=nand0=orion_nand\0" \
"mtdparts="CONFIG_MTDPARTS \
"kernel=/boot/zImage\0" \
"fdt=/boot/nsa310s.dtb\0" \
"bootargs_root=ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs rw\0"
/* Ethernet driver configuration */
#ifdef CONFIG_CMD_NET
#define CONFIG_NETCONSOLE
#define CONFIG_NET_MULTI
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 1
#define CONFIG_PHY_GIGE
#define CONFIG_RESET_PHY_R
#endif /* CONFIG_CMD_NET */
/* SATA driver configuration */
#ifdef CONFIG_CMD_IDE
#define __io
#define CONFIG_IDE_PREINIT
#define CONFIG_DOS_PARTITION
#define CONFIG_MVSATA_IDE_USE_PORT0
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /* CONFIG_CMD_IDE */
/* RTC driver configuration */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_MV
#endif /* CONFIG_CMD_DATE */
#endif /* _CONFIG_NSA310S_H */
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