Commit f4f8dbcb authored by Ye Li's avatar Ye Li Committed by Jason Liu

MLK-16208-2 imx8qm/qxp: add function to read ARM core part number

Add a function to read the MIDR_EL1 register from ARM to get its
part number. This is used to distinguish the A53/A35/A72.
Signed-off-by: default avatarYe Li <ye.li@nxp.com>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
parent 98005e0b
......@@ -11,6 +11,7 @@
#include <asm/arch/imx8-pins.h>
#include <asm/arch/i2c.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/cpu.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -24,10 +25,13 @@ static u32 get_arm_main_clk(void)
sc_err_t err;
sc_pm_clock_rate_t clkrate;
if (is_imx8qm())
if (is_cortex_a53())
err = sc_pm_get_clock_rate((sc_ipc_t)gd->arch.ipc_channel_handle,
SC_R_A53, SC_PM_CLK_CPU, &clkrate);
else if (is_imx8qxp())
else if (is_cortex_a72())
err = sc_pm_get_clock_rate((sc_ipc_t)gd->arch.ipc_channel_handle,
SC_R_A72, SC_PM_CLK_CPU, &clkrate);
else if (is_cortex_a35())
err = sc_pm_get_clock_rate((sc_ipc_t)gd->arch.ipc_channel_handle,
SC_R_A35, SC_PM_CLK_CPU, &clkrate);
else
......
......@@ -3,5 +3,23 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define MIDR_PARTNUM_CORTEX_A35 0xD04
#define MIDR_PARTNUM_CORTEX_A53 0xD03
#define MIDR_PARTNUM_CORTEX_A72 0xD08
#define MIDR_PARTNUM_SHIFT 0x4
#define MIDR_PARTNUM_MASK (0xFFF << 0x4)
static inline unsigned int read_midr(void)
{
unsigned long val;
asm volatile("mrs %0, midr_el1" : "=r" (val));
return val;
}
#define is_cortex_a35() (((read_midr() & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A35)
#define is_cortex_a53() (((read_midr() & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A53)
#define is_cortex_a72() (((read_midr() & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT) == MIDR_PARTNUM_CORTEX_A72)
u32 cpu_mask(void);
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