Commit f6ccfcc1 authored by Peng Fan's avatar Peng Fan

MLK-18333-3 imx8mm: add qspi boot support

Introduce spl_qspi.cfg for booting from qspi.
Add new defconfig files.
Signed-off-by: 's avatarPeng Fan <peng.fan@nxp.com>
parent 3735aedb
/*
* Copyright 2018 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
#define __ASSEMBLY__
#include <config.h>
IMAGE_VERSION 2
BOOT_FROM qspi
/*
* Secure boot support
*/
#ifdef CONFIG_SECURE_BOOT
CSF CONFIG_CSF_SIZE
#endif
......@@ -6,9 +6,10 @@ CONFIG_TARGET_IMX8MM_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk"
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL_TEXT_BASE=0x7E1000,ENV_IS_IN_MMC"
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
......
CONFIG_ARM=y
CONFIG_ARCH_IMX8M=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_USB_TCPC=y
CONFIG_TARGET_IMX8MM_EVK=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8mm-evk"
CONFIG_FIT=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_qspi.cfg,SPL_TEXT_BASE=0x7E2000,ENV_IS_IN_SPI_FLASH"
CONFIG_ARCH_MISC_INIT=y
CONFIG_SPL=y
CONFIG_SPL_NOR_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_SF=y
CONFIG_CMD_I2C=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
# CONFIG_BLK is not set
CONFIG_DM_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_DM_MMC=y
# CONFIG_DM_MMC_OPS is not set
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_DM_SPI=y
CONFIG_FSL_FSPI=y
CONFIG_DM_THERMAL=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_EHCI_HCD=y
......@@ -15,12 +15,12 @@
#endif
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x7E1000
#define CONFIG_SPL_MAX_SIZE (124 * 1024)
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
#define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
......@@ -34,7 +34,6 @@
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
#define CONFIG_SYS_SPL_MALLOC_START 0x00182000
......@@ -188,9 +187,17 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET (64 * SZ_64K)
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET (4 * 1024 * 1024)
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#endif
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */
#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
......
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