Commit fe8c2806 authored by wdenk's avatar wdenk

Initial revision

parent f9087a32
This diff is collapsed.
/* most of this is taken from the file */
/* hal/powerpc/cogent/current/src/hal_diag.c in the */
/* Cygnus eCos source. Here is the copyright notice: */
/* */
/*============================================================================= */
/* */
/* hal_diag.c */
/* */
/* HAL diagnostic output code */
/* */
/*============================================================================= */
/*####COPYRIGHTBEGIN#### */
/* */
/* ------------------------------------------- */
/* The contents of this file are subject to the Cygnus eCos Public License */
/* Version 1.0 (the "License"); you may not use this file except in */
/* compliance with the License. You may obtain a copy of the License at */
/* http://sourceware.cygnus.com/ecos */
/* */
/* Software distributed under the License is distributed on an "AS IS" */
/* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the */
/* License for the specific language governing rights and limitations under */
/* the License. */
/* */
/* The Original Code is eCos - Embedded Cygnus Operating System, released */
/* September 30, 1998. */
/* */
/* The Initial Developer of the Original Code is Cygnus. Portions created */
/* by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. */
/* ------------------------------------------- */
/* */
/*####COPYRIGHTEND#### */
/*============================================================================= */
/*#####DESCRIPTIONBEGIN#### */
/* */
/* Author(s): nickg, jskov */
/* Contributors: nickg, jskov */
/* Date: 1999-03-23 */
/* Purpose: HAL diagnostic output */
/* Description: Implementations of HAL diagnostic output support. */
/* */
/*####DESCRIPTIONEND#### */
/* */
/*============================================================================= */
/*----------------------------------------------------------------------------- */
/* Cogent board specific LCD code */
#include <common.h>
#include <stdarg.h>
#include <board/cogent/lcd.h>
static char lines[2][LCD_LINE_LENGTH+1];
static int curline;
static int linepos;
static int heartbeat_active;
/* make the next two strings exactly LCD_LINE_LENGTH (16) chars long */
/* pad to the right with spaces if necessary */
static char init_line0[LCD_LINE_LENGTH+1] = "U-Boot Cogent ";
static char init_line1[LCD_LINE_LENGTH+1] = "mjj, 11 Aug 2000";
static inline unsigned char
lcd_read_status(cma_mb_lcd *clp)
{
/* read the Busy Status Register */
return (cma_mb_reg_read(&clp->lcd_bsr));
}
static inline void
lcd_wait_not_busy(cma_mb_lcd *clp)
{
/*
* wait for not busy
* Note: It seems that the LCD isn't quite ready to process commands
* when it clears the BUSY flag. Reading the status address an extra
* time seems to give it enough breathing room.
*/
while (lcd_read_status(clp) & LCD_STAT_BUSY)
;
(void)lcd_read_status(clp);
}
static inline void
lcd_write_command(cma_mb_lcd *clp, unsigned char cmd)
{
lcd_wait_not_busy(clp);
/* write the Command Register */
cma_mb_reg_write(&clp->lcd_cmd, cmd);
}
static inline void
lcd_write_data(cma_mb_lcd *clp, unsigned char data)
{
lcd_wait_not_busy(clp);
/* write the Current Character Register */
cma_mb_reg_write(&clp->lcd_ccr, data);
}
static inline void
lcd_dis(int addr, char *string)
{
cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
int pos, linelen;
linelen = LCD_LINE_LENGTH;
if (heartbeat_active && addr == LCD_LINE0)
linelen--;
lcd_write_command(clp, LCD_CMD_ADD + addr);
for (pos = 0; *string != '\0' && pos < linelen; pos++)
lcd_write_data(clp, *string++);
}
void
lcd_init(void)
{
cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
int i;
/* configure the lcd for 8 bits/char, 2 lines and 5x7 dot matrix */
lcd_write_command(clp, LCD_CMD_MODE);
/* turn the LCD display on */
lcd_write_command(clp, LCD_CMD_DON);
curline = 0;
linepos = 0;
for (i = 0; i < LCD_LINE_LENGTH; i++) {
lines[0][i] = init_line0[i];
lines[1][i] = init_line1[i];
}
lines[0][LCD_LINE_LENGTH] = lines[1][LCD_LINE_LENGTH] = 0;
lcd_dis(LCD_LINE0, lines[0]);
lcd_dis(LCD_LINE1, lines[1]);
printf("HD44780 2 line x %d char display\n", LCD_LINE_LENGTH);
}
void
lcd_write_char(const char c)
{
int i, linelen;
/* ignore CR */
if (c == '\r')
return;
linelen = LCD_LINE_LENGTH;
if (heartbeat_active && curline == 0)
linelen--;
if (c == '\n') {
lcd_dis(LCD_LINE0, &lines[curline^1][0]);
lcd_dis(LCD_LINE1, &lines[curline][0]);
/* Do a line feed */
curline ^= 1;
linelen = LCD_LINE_LENGTH;
if (heartbeat_active && curline == 0)
linelen--;
linepos = 0;
for (i = 0; i < linelen; i++)
lines[curline][i] = ' ';
return;
}
/* Only allow to be output if there is room on the LCD line */
if (linepos < linelen)
lines[curline][linepos++] = c;
}
void
lcd_flush(void)
{
lcd_dis(LCD_LINE1, &lines[curline][0]);
}
void
lcd_write_string(const char *s)
{
char *p;
for (p = (char *)s; *p != '\0'; p++)
lcd_write_char(*p);
}
void
lcd_printf(const char *fmt, ...)
{
va_list args;
char buf[CFG_PBSIZE];
va_start(args, fmt);
(void)vsprintf(buf, fmt, args);
va_end(args);
lcd_write_string(buf);
}
void
lcd_heartbeat(void)
{
cma_mb_lcd *clp = (cma_mb_lcd *)CMA_MB_LCD_BASE;
#if 0
static char rotchars[] = { '|', '/', '-', '\\' };
#else
/* HD44780 Rom Code A00 has no backslash */
static char rotchars[] = { '|', '/', '-', '\315' };
#endif
static int rotator_index = 0;
heartbeat_active = 1;
/* write the address */
lcd_write_command(clp, LCD_CMD_ADD + LCD_LINE0 + (LCD_LINE_LENGTH - 1));
/* write the next char in the sequence */
lcd_write_data(clp, rotchars[rotator_index]);
if (++rotator_index >= (sizeof rotchars / sizeof rotchars[0]))
rotator_index = 0;
}
/* most of this is taken from the file */
/* hal/powerpc/cogent/current/src/hal_diag.c in the */
/* Cygnus eCos source. Here is the copyright notice: */
/* */
/*============================================================================= */
/* */
/* hal_diag.c */
/* */
/* HAL diagnostic output code */
/* */
/*============================================================================= */
/*####COPYRIGHTBEGIN#### */
/* */
/* ------------------------------------------- */
/* The contents of this file are subject to the Cygnus eCos Public License */
/* Version 1.0 (the "License"); you may not use this file except in */
/* compliance with the License. You may obtain a copy of the License at */
/* http://sourceware.cygnus.com/ecos */
/* */
/* Software distributed under the License is distributed on an "AS IS" */
/* basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See the */
/* License for the specific language governing rights and limitations under */
/* the License. */
/* */
/* The Original Code is eCos - Embedded Cygnus Operating System, released */
/* September 30, 1998. */
/* */
/* The Initial Developer of the Original Code is Cygnus. Portions created */
/* by Cygnus are Copyright (C) 1998,1999 Cygnus Solutions. All Rights Reserved. */
/* ------------------------------------------- */
/* */
/*####COPYRIGHTEND#### */
/*============================================================================= */
/*#####DESCRIPTIONBEGIN#### */
/* */
/* Author(s): nickg, jskov */
/* Contributors: nickg, jskov */
/* Date: 1999-03-23 */
/* Purpose: HAL diagnostic output */
/* Description: Implementations of HAL diagnostic output support. */
/* */
/*####DESCRIPTIONEND#### */
/* */
/*============================================================================= */
/* FEMA 162B 16 character x 2 line LCD */
/* status register bit definitions */
#define LCD_STAT_BUSY 0x80 /* 1 = display busy */
#define LCD_STAT_ADD 0x7F /* bits 0-6 return current display address */
/* command register definitions */
#define LCD_CMD_RST 0x01 /* clear entire display and reset display addr */
#define LCD_CMD_HOME 0x02 /* reset display address and reset any shifting */
#define LCD_CMD_ECL 0x04 /* move cursor left one pos on next data write */
#define LCD_CMD_ESL 0x05 /* shift display left one pos on next data write */
#define LCD_CMD_ECR 0x06 /* move cursor right one pos on next data write */
#define LCD_CMD_ESR 0x07 /* shift disp right one pos on next data write */
#define LCD_CMD_DOFF 0x08 /* display off, cursor off, blinking off */
#define LCD_CMD_BL 0x09 /* blink character at current cursor position */
#define LCD_CMD_CUR 0x0A /* enable cursor on */
#define LCD_CMD_DON 0x0C /* turn display on */
#define LCD_CMD_CL 0x10 /* move cursor left one position */
#define LCD_CMD_SL 0x14 /* shift display left one position */
#define LCD_CMD_CR 0x18 /* move cursor right one position */
#define LCD_CMD_SR 0x1C /* shift display right one position */
#define LCD_CMD_MODE 0x38 /* sets 8 bits, 2 lines, 5x7 characters */
#define LCD_CMD_ACG 0x40 /* bits 0-5 sets character generator address */
#define LCD_CMD_ADD 0x80 /* bits 0-6 sets display data addr to line 1 + */
/* LCD status values */
#define LCD_OK 0x00
#define LCD_ERR 0x01
#define LCD_LINE0 0x00
#define LCD_LINE1 0x40
#define LCD_LINE_LENGTH 16
extern void lcd_init(void);
extern void lcd_write_char(const char);
extern void lcd_flush(void);
extern void lcd_write_string(const char *);
extern void lcd_printf(const char *, ...);
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/*------------------------------------------------------------------------------+ */
/* */
/* This source code has been made available to you by IBM on an AS-IS */
/* basis. Anyone receiving this source is licensed under IBM */
/* copyrights to use it in any way he or she deems fit, including */
/* copying it, modifying it, compiling it, and redistributing it either */
/* with or without modifications. No license under IBM patents or */
/* patent applications is to be implied by the copyright license. */
/* */
/* Any user of this software should understand that IBM cannot provide */
/* technical support for this software and will not be responsible for */
/* any consequences resulting from the use of this software. */
/* */
/* Any person who transfers this source code or any derivative work */
/* must include the IBM copyright notice, this paragraph, and the */
/* preceding two paragraphs in the transferred software. */
/* */
/* COPYRIGHT I B M CORPORATION 1995 */
/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
/*------------------------------------------------------------------------------- */
/*----------------------------------------------------------------------------- */
/* Function: ext_bus_cntlr_init */
/* Description: Initializes the External Bus Controller for the external */
/* peripherals. IMPORTANT: For pass1 this code must run from */
/* cache since you can not reliably change a peripheral banks */
/* timing register (pbxap) while running code from that bank. */
/* For ex., since we are running from ROM on bank 0, we can NOT */
/* execute the code that modifies bank 0 timings from ROM, so */
/* we run it from cache. */
/* Bank 0 - Flash and SRAM */
/* Bank 1 - NVRAM/RTC */
/* Bank 2 - Keyboard/Mouse controller */
/* Bank 3 - IR controller */
/* Bank 4 - not used */
/* Bank 5 - not used */
/* Bank 6 - not used */
/* Bank 7 - FPGA registers */
/*-----------------------------------------------------------------------------#include <config.h> */
#include <ppc4xx.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
#include <ppc_asm.tmpl>
#include <ppc_defs.h>
#include <asm/cache.h>
#include <asm/mmu.h>
/* CRAY - L1: only nominally a 'walnut', since ext.Bus.Cntlr is all empty */
/* except for #1 which we use for DMA'ing to IOCA-like things, so the */
/* control registers to set that up are determined by what we've */
/* empirically discovered work there. */
.globl ext_bus_cntlr_init
ext_bus_cntlr_init:
mflr r4 /* save link register */
bl ..getAddr
..getAddr:
mflr r3 /* get address of ..getAddr */
mtlr r4 /* restore link register */
addi r4,0,14 /* set ctr to 10; used to prefetch */
mtctr r4 /* 10 cache lines to fit this function */
/* in cache (gives us 8x10=80 instrctns) */
..ebcloop:
icbt r0,r3 /* prefetch cache line for addr in r3 */
addi r3,r3,32 /* move to next cache line */
bdnz ..ebcloop /* continue for 10 cache lines */
/*------------------------------------------------------------------- */
/* Delay to ensure all accesses to ROM are complete before changing */
/* bank 0 timings. 200usec should be enough. */
/* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
/*------------------------------------------------------------------- */
addis r3,0,0x0
ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
mtctr r3
..spinlp:
bdnz ..spinlp /* spin loop */
/*---------------------------------------------------------------------- */
/* Peripheral Bank 0 (Flash) initialization */
/*---------------------------------------------------------------------- */
/* 0x7F8FFE80 slowest boot */
addi r4,0,pb0ap
mtdcr ebccfga,r4
addis r4,0,0x9B01
ori r4,r4,0x5480
mtdcr ebccfgd,r4
addi r4,0,pb0cr
mtdcr ebccfga,r4
addis r4,0,0xFFC5 /* BAS=0xFFC,BS=0x4(4MB),BU=0x3(R/W), */
ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
mtdcr ebccfgd,r4
blr
/*---------------------------------------------------------------------- */
/* Peripheral Bank 1 (NVRAM/RTC) initialization */
/* CRAY:the L1 has NOT this bank, it is tied to SV2/IOCA/etc/ instead */
/* and we do DMA on it. The ConfigurationRegister part is threfore */
/* almost arbitrary, except that our linux driver needs to know the */
/* address, but it can query, it.. */
/* */
/* The AccessParameter is CRITICAL, */
/* thouch, since it needs to agree with the electrical timings on the */
/* IOCA parallel interface. That value is: 0x0185,4380 */
/* BurstModeEnable BME=0 */
/* TransferWait TWT=3 */
/* ChipSelectOnTiming CSN=1 */
/* OutputEnableOnTimimg OEN=1 */
/* WriteByteEnableOnTiming WBN=1 */
/* WriteByteEnableOffTiming WBF=0 */
/* TransferHold TH=1 */
/* ReadyEnable RE=1 */
/* SampleOnReady SOR=1 */
/* ByteEnableMode BEM=0 */
/* ParityEnable PEN=0 */
/* all reserved bits=0 */
/*---------------------------------------------------------------------- */
/*---------------------------------------------------------------------- */
addi r4,0,pb1ap
mtdcr ebccfga,r4
addis r4,0,0x0185 /* hiword */
ori r4,r4,0x4380 /* loword */
mtdcr ebccfgd,r4
addi r4,0,pb1cr
mtdcr ebccfga,r4
addis r4,0,0xF001 /* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), */
ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
mtdcr ebccfgd,r4
blr
/*----------------------------------------------------------------------------- */
/* Function: sdram_init */
/* Description: Configures SDRAM memory banks. */
/* NOTE: for CrayL1 we have ECC memory, so enable it. */
/*....now done in C in L1.c:init_sdram for readability. */
/*----------------------------------------------------------------------------- */
.globl sdram_init
sdram_init:
blr
#
# DNP/1110 board with SA1100 cpu
#
# http://www.dilnetpc.com
#
#
# DILNETPC has 1 banks of 32 MB DRAM
#
# c000'0000
#
# Linux-Kernel is expected to be at c000'8000, entry c000'8000
#
# we load ourself to c1f0'0000, the upper 1 MB of the first (only) bank
#
TEXT_BASE = 0xc1f00000
/*
* Memory Setup stuff - taken from blob memsetup.S
*
* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
/* some parameters for the board */
MEM_BASE: .long 0xa0000000
MEM_START: .long 0xc0000000
#define MDCNFG 0x00
#define MDCAS0 0x04
#define MDCAS1 0x08
#define MDCAS2 0x0c
#define MSC0 0x10
#define MSC1 0x14
#define MECR 0x18
mdcas0: .long 0xc71c703f
mdcas1: .long 0xffc71c71
mdcas2: .long 0xffffffff
/* mdcnfg: .long 0x0bb2bcbf */
mdcnfg: .long 0x0334b22f @ alt
/* mcs0: .long 0xfff8fff8 */
msc0: .long 0xad8c4888 @ alt
mecr: .long 0x00060006
/* mecr: .long 0x994a994a @ alt */
/* setting up the memory */
.globl memsetup
memsetup:
ldr r0, MEM_BASE
/* Setup the flash memory */
ldr r1, msc0
str r1, [r0, #MSC0]
/* Set up the DRAM */
/* MDCAS0 */
ldr r1, mdcas0
str r1, [r0, #MDCAS0]
/* MDCAS1 */
ldr r1, mdcas1
str r1, [r0, #MDCAS1]
/* MDCAS2 */
ldr r1, mdcas2
str r1, [r0, #MDCAS2]
/* MDCNFG */
ldr r1, mdcnfg
str r1, [r0, #MDCNFG]
/* Set up PCMCIA space */
ldr r1, mecr
str r1, [r0, #MECR]
/* Load something to activate bank */
ldr r1, MEM_START
.rept 8
ldr r0, [r1]
.endr
/* everything is fine now */
mov pc, lr
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#
# (C) Copyright 2000
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
# Marius Groeger <mgroeger@sysgo.de>
#
# (C) Copyright 2000
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
#
# MHPC boards
#
TEXT_BASE = 0xfe000000
/*TEXT_BASE = 0x00200000 */
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/*
* (C) Copyright 2001
* Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <ppc4xx.h>
#include <asm/processor.h>
/*
* include common flash code (for esd boards)
*/
#include "../common/flash.c"
/*-----------------------------------------------------------------------
* Functions
*/
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static void flash_get_offsets (ulong base, flash_info_t *info);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
unsigned long size_b0, size_b1;
int i;
uint pbcr;
unsigned long base_b0, base_b1;
/* Init: no FLASHes known */
for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}