1. 03 Oct, 2012 2 commits
  2. 18 Sep, 2012 1 commit
    • Marek Vasut's avatar
      ARM: Remove apollon board · 535c74f8
      Marek Vasut authored
      This board is the only board that still sticks to OneNAND IPL.
      Remove this board, since we have SPL around for a while and
      OneNAND is well supported in the SPL framework. The board can
      be revived if necessary.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Kyungmin Park <kyungmin.park@samsung.com>
      Cc: Tom Rini <trini@ti.com>
      535c74f8
  3. 13 Sep, 2012 1 commit
  4. 04 Sep, 2012 1 commit
  5. 01 Sep, 2012 16 commits
  6. 23 Aug, 2012 4 commits
    • Daniel Schwierzeck's avatar
      MIPS: add support for qemu for little endian MIPS32 CPUs · 748fd4a6
      Daniel Schwierzeck authored
      Tested with 'qemu-system-mipsel -machine mips -bios u-boot.bin -nographic'
      Signed-off-by: 's avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
      748fd4a6
    • Timur Tabi's avatar
      powerpc/85xx: remove support for the Freescale P3060 · 055ce080
      Timur Tabi authored
      The P3060 was cancelled before it went into production, so there's no point
      in supporting it.
      Signed-off-by: 's avatarTimur Tabi <timur@freescale.com>
      Signed-off-by: 's avatarAndy Fleming <afleming@freescale.com>
      055ce080
    • Liu Gang's avatar
      powerpc/corenet_ds: Slave module for boot from PCIE · 461632bd
      Liu Gang authored
      When boot from PCIE, slave's core should be in holdoff after powered on for
      some specific requirements. Master will release the slave's core at the
      right time by PCIE interface.
      
      Slave's ucode and ENV can be stored in master's memory space, then slave
      can fetch them through PCIE interface. For the corenet platform, ucode is
      for Fman.
      
      NOTE: Because the slave can not erase, write master's NOR flash by
      	  PCIE interface, so it can not modify the ENV parameters stored
      	  in master's NOR flash using "saveenv" or other commands.
      
      environment and requirement:
      
      master:
      	1. NOR flash for its own u-boot image, ucode and ENV space.
      	2. Slave's u-boot image is in master NOR flash.
      	3. Put the slave's ucode and ENV into it's own memory space.
      	4. Normally boot from local NOR flash.
      	5. Configure PCIE system if needed.
      slave:
      	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
      	2. Boot location should be set to one PCIE interface by RCW.
      	3. RCW should configure the SerDes, PCIE interfaces correctly.
      	4. Must set all the cores in holdoff by RCW.
      	5. Must be powered on before master's boot.
      
      For the slave module, need to finish these processes:
      	1. Set the boot location to one PCIE interface by RCW.
          2. Set a specific TLB entry for the boot process.
      	3. Set a LAW entry with the TargetID of one PCIE for the boot.
      	4. Set a specific TLB entry in order to fetch ucode and ENV from
      	   master.
      	5. Set a LAW entry with the TargetID one of the PCIE ports for
      	   ucode and ENV.
      	6. Slave's u-boot image should be generated specifically by
      	   make xxxx_SRIO_PCIE_BOOT_config.
      	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
      
      In addition, the processes are very similar between boot from SRIO and
      boot from PCIE. Some configurations like the address spaces can be set to
      the same. So the module of boot from PCIE was added based on the existing
      module of boot from SRIO, and the following changes were needed:
      	1. Updated the README.srio-boot-corenet to add descriptions about
      	   boot from PCIE, and change the name to
      	   README.srio-pcie-boot-corenet.
      	2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
      	   "xxxx_SRIO_PCIE_BOOT", and the image builded with
      	   "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
      	   from PCIE.
      	3. Updated other macros and documents if needed to add information
      	   about boot from PCIE.
      Signed-off-by: 's avatarLiu Gang <Gang.Liu@freescale.com>
      Signed-off-by: 's avatarAndy Fleming <afleming@freescale.com>
      461632bd
    • Liu Gang's avatar
      powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build target · ff65f126
      Liu Gang authored
      Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
      a SRIO boot master via environment variable. Set the environment variable
      "bootmaster" to "SRIO1" or "SRIO2" using the following command:
      
      		setenv bootmaster SRIO1
      		saveenv
      
      The "bootmaster" will enable the function of the SRIO boot master, and
      this has the following advantages compared with SRIOBOOT_MASTER build
      configuration:
      	1. Reduce a build configuration item in boards.cfg file.
      	   No longer need to build a special image for master, just use a
      	   normal target image and set the "bootmaster" variable.
      	2. No longer need to rebuild an image when change the SRIO port for
      	   boot from SRIO, just set the corresponding value to "bootmaster"
      	   based on the using SRIO port.
      Signed-off-by: 's avatarLiu Gang <Gang.Liu@freescale.com>
      Signed-off-by: 's avatarAndy Fleming <afleming@freescale.com>
      ff65f126
  7. 09 Aug, 2012 2 commits
  8. 08 Aug, 2012 1 commit
  9. 31 Jul, 2012 1 commit
  10. 09 Jul, 2012 1 commit
  11. 07 Jul, 2012 10 commits