1. 24 Sep, 2015 4 commits
  2. 20 Sep, 2015 19 commits
  3. 17 Sep, 2015 16 commits
  4. 16 Sep, 2015 1 commit
    • Thierry Reding's avatar
      ARM: tegra114: Clear IDDQ when enabling PLLC · 8e1601d9
      Thierry Reding authored
      Enabling a PLL while IDDQ is high. The Linux kernel checks for this
      condition and warns about it verbosely, so while this seems to work
      fine, fix it up according to the programming guidelines provided in
      the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
      Sequence"). The Tegra114 TRM doesn't contain this information, but
      the programming of PLLC is the same on Tegra114 and Tegra124.
      Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
      Signed-off-by: default avatarTom Warren <twarren@nvidia.com>
      8e1601d9