1. 24 Jul, 2013 1 commit
  2. 23 Jul, 2010 1 commit
    • Stefan Roese's avatar
      ppc4xx: T3CORP fixes and updates · 5bf39a96
      Stefan Roese authored
      This patch fixes some problems for the T3CORP board. Here the list
      of the changes:
      
      - Add 600-67 and 677 CPU frequency setting to chip_config
        command
      - Define CONFIG_DDR_RFDC_FIXED on t3corp:
        While using the "normal" auto calibration code, sometimes values for
        RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
        upon relocation, while running from SDRAM). With this optimized RFDC
        value we can force this register and use the auto-calibration code to
        setup the remaining calibration registers.
      - Increase sizes of FPGA chips selects
      - EBC timing updated OEN=3 for 66 MHz EBC speed
      - Change ext. IRQ2 setup to level-low active
      - Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL
      
      By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
      chip busy status. This is now used instead of the data toggle method which
      is used historically by default in the common CFI driver. With this change
      a problem with not written data is solved on this board, where a 32 byte
      block of data is still erased instead of filled with the correct content
      after these commands:
      
      => erase 0xfc100000 +0x1000000
      
      ....................................................................
      done
      Erased 128 sectors
      => cp.b 0x100000 0xfc100000 0x1000000
      Copy to Flash... done
      => cmp.b 0x100000 0xfc100000 0x1000000
      byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
      Total of 12637888 bytes were the same
      Signed-off-by: default avatarStefan Roese <sr@denx.de>
      5bf39a96
  3. 01 Jul, 2010 1 commit
  4. 10 Nov, 2009 1 commit
  5. 24 Jul, 2009 1 commit