1. 14 Mar, 2016 1 commit
  2. 13 Jan, 2016 1 commit
  3. 22 Dec, 2015 2 commits
  4. 20 Dec, 2015 1 commit
    • Marek Vasut's avatar
      arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data · 70311e69
      Marek Vasut authored
      This patch adds the necessary OF alias for the UDC node, which let's
      the code locate the DWC2 UDC base address in OF instead of hard-coding
      it into the U-Boot binary. The code is adjusted to use the address from
      OF instead of the hard-coded one. Finally, the hard-coded address is
      removed and USB DM support is enabled.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Lukasz Majewski <l.majewski@majess.pl>
      Cc: Lukasz Majewski <l.majewski@samsung.com>
      70311e69
  5. 06 Dec, 2015 1 commit
    • Marek Vasut's avatar
      arm: socfpga: Enable CONFIG_DM_MMC · 540fcbca
      Marek Vasut authored
      Enable driver model MMC support on SoCFPGA.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Tom Rini <trini@konsulko.com>
      540fcbca
  6. 25 Nov, 2015 2 commits
  7. 22 Nov, 2015 1 commit
  8. 18 Nov, 2015 1 commit
  9. 28 Sep, 2015 1 commit
  10. 23 Aug, 2015 3 commits
    • Marek Vasut's avatar
      arm: socfpga: Enable ethernet on ArriaV SoCDK · 9238b52a
      Marek Vasut authored
      Synchronise the config options with Cyclone V SoCDK and other boards.
      This enables ethernet on the ArriaV SoCDK.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      9238b52a
    • Marek Vasut's avatar
      arm: socfpga: Enable DWAPB GPIO driver · 1bd57ff5
      Marek Vasut authored
      Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      1bd57ff5
    • Marek Vasut's avatar
      arm: socfpga: Unbind CPU type from board type · cd9b7317
      Marek Vasut authored
      The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
      selected both a board and a CPU. This is not correct as these macros
      are supposed to select only board.
      
      All would be good, if QTS-generated header files didn't check for
      these macros exactly to determine if the platform is Cyclone V or
      Arria V. Thus, for the sake of compatibility with not well fleshed
      out header file generator, this patch makes these two macros into
      a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
      and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
      previous stub config option.
      
      The result is that compatibility with QTS is preserved and the new
      CONFIG_TARGET_* select actual target boards.
      Signed-off-by: 's avatarMarek Vasut <marex@denx.de>
      cd9b7317
  11. 21 Aug, 2015 1 commit
  12. 18 Aug, 2015 1 commit
  13. 08 Aug, 2015 3 commits
  14. 26 Jun, 2015 2 commits
  15. 01 Jun, 2015 2 commits
  16. 12 May, 2015 1 commit
  17. 10 May, 2015 1 commit
  18. 07 May, 2015 1 commit
  19. 18 Apr, 2015 1 commit
  20. 15 Mar, 2015 1 commit
  21. 05 Mar, 2015 1 commit
  22. 04 Mar, 2015 2 commits