1. 14 Mar, 2016 2 commits
    • Simon Glass's avatar
      Kconfig: Move CONFIG_FIT and related options to Kconfig · 73223f0e
      Simon Glass authored
      There are already two FIT options in Kconfig but the CONFIG options are
      still in the header files. We need to do a proper move to fix this.
      
      Move these options to Kconfig and tidy up board configuration:
      
         CONFIG_FIT
         CONFIG_OF_BOARD_SETUP
         CONFIG_OF_SYSTEM_SETUP
         CONFIG_FIT_SIGNATURE
         CONFIG_FIT_BEST_MATCH
         CONFIG_FIT_VERBOSE
         CONFIG_OF_STDOUT_VIA_ALIAS
         CONFIG_RSA
      
      Unfortunately the first one is a little complicated. We need to make sure
      this option is not enabled in SPL by this change. Also this option is
      enabled automatically in the host builds by defining CONFIG_FIT in the
      image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
      be used in files that are built on the host but must also build for U-Boot
      and SPL.
      
      Note: Masahiro's moveconfig.py script is amazing.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      [trini: Add microblaze change, various configs/ re-applies]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      73223f0e
    • Simon Glass's avatar
      freescale: Remove CONFIG_DM from header files · 9e971632
      Simon Glass authored
      Kconfig options must defined in the defconfig files. Since RSA_SOFTWARE_EXP
      relies on CONFIG_DM, unless it is set in kconfig we cannot enable RSA.
      Remove the hacks which enable CONFIG_DM in header files and update the
      defconfig.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      9e971632
  2. 24 Feb, 2016 1 commit
  3. 27 Jan, 2016 5 commits
  4. 25 Jan, 2016 1 commit
  5. 19 Jan, 2016 1 commit
  6. 14 Dec, 2015 2 commits
  7. 22 Nov, 2015 1 commit
  8. 09 Nov, 2015 1 commit
    • Måns Rullgård's avatar
      Replace "extern inline" with "static inline" · 44d0677a
      Måns Rullgård authored
      A number of headers define functions as "extern inline" which is
      causing problems with gcc5.  The reason is that starting with
      version 5.1, gcc defaults to the standard C99 semantics for the
      inline keyword.
      
      Under the traditional GNU inline semantics, an "extern inline"
      function would never create an external definition, the same
      as inline *without* extern in C99.  In C99, and "extern inline"
      definition is simply an external definition with an inline hint.
      In short, the meanings of inline with and without extern are
      swapped between GNU and C99.
      
      The upshot is that all these definitions in header files create
      an external definition wherever those headers are included,
      resulting in multiple definition errors at link time.
      
      Changing all these functions to "static inline" fixes the problem
      since this works as desired in all gcc versions.  Although the
      semantics are slightly different (a static inline definition may
      result in an actual function being emitted), it works as intended
      in practice.
      
      This patch also removes extern prototype declarations for the
      changed functions where they existed.
      Signed-off-by: default avatarMans Rullgard <mans@mansr.com>
      44d0677a
  9. 05 Nov, 2015 1 commit
  10. 02 Nov, 2015 1 commit
  11. 29 Oct, 2015 1 commit
  12. 11 Oct, 2015 1 commit
  13. 02 Sep, 2015 3 commits
  14. 13 Aug, 2015 1 commit
  15. 31 Jul, 2015 2 commits
  16. 28 Jul, 2015 3 commits
  17. 04 May, 2015 5 commits
  18. 23 Apr, 2015 1 commit
    • Shaohui Xie's avatar
      net/memac_phy: reuse driver for little endian SoCs · cd348efa
      Shaohui Xie authored
      The memac for PHY management on little endian SoCs is similar on big
      endian SoCs, so we modify the driver by using I/O accessor function to
      handle the endianness, so the driver can be reused on little endian
      SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
      SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
      is little endian, if not, the I/O access is big endian. Move fsl_memac.h
      out of powerpc include.
      Signed-off-by: default avatarShaohui Xie <Shaohui.Xie@freescale.com>
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      cd348efa
  19. 21 Apr, 2015 1 commit
    • gaurav rana's avatar
      Add bootscript support to esbc_validate. · 98cb0efd
      gaurav rana authored
      1. Default environment will be used for secure boot flow
       which can't be edited or saved.
      2. Command for secure boot is predefined in the default
       environment which will run on autoboot (and autoboot is
       the only option allowed in case of secure boot) and it
       looks like this:
       #define CONFIG_SECBOOT \
       "setenv bs_hdraddr 0xe8e00000;"                 \
       "esbc_validate $bs_hdraddr;"                    \
       "source $img_addr;"                             \
       "esbc_halt;"
       #endif
      3. Boot Script can contain esbc_validate commands and bootm command.
       Uboot source command used in default secure boot command will
       run the bootscript.
      4. Command esbc_halt added to ensure either bootm executes
       after validation of images or core should just spin.
      Signed-off-by: default avatarRuchika Gupta <ruchika.gupta@freescale.com>
      Signed-off-by: default avatarGaurav Rana <gaurav.rana@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      98cb0efd
  20. 20 Apr, 2015 1 commit
  21. 05 Mar, 2015 2 commits
  22. 04 Mar, 2015 2 commits
    • Ying Zhang's avatar
      powerpc: 85xx: Modify CONFIG_USB_MAX_CONTROLLER_COUNT for P1022DS · 703f5681
      Ying Zhang authored
      Modify CONFIG_USB_MAX_CONTROLLER_COUNT value to 1 on P1022DS.
      As ETSEC2 and USB2 are muxed; thus if ETSEC2 is enabled, the
      system bus hangs on USB2 if ETSEC2 is enabled but "usb start"
      command is issued. Hence making default controller count to 1
      to avoid system hang.
      Signed-off-by: default avatarNikhil Badola <nikhil.badola@freescale.com>
      Reviewed-by: default avatarYusong Sun <yorksun@freescale.com>
      703f5681
    • Shaveta Leekha's avatar
      powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs · b8bf0adc
      Shaveta Leekha authored
      The code provides framework for heterogeneous multicore chips based on StarCore
      and Power Architecture which are chasis-2 compliant, like B4860 and B4420
      
      It will make u-boot recognize all non-ppc cores and peripherals like
      SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
      Example boot logs of B4860QDS:
      
      U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45)
      
      CPU0:  B4860E, Version: 2.2, (0x86880022)
      Core:  e6500, Version: 2.0, (0x80400120)
      Clock Configuration:
             CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
             DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
             DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
             CCB:666.667 MHz,
             DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
             CPRI:600  MHz
             MAPLE:600  MHz, MAPLE-ULB:800  MHz, MAPLE-eTVPE:1000 MHz
             FMAN1: 666.667 MHz
             QMAN:  333.333 MHz
      
      Top level changes include:
      (1) Top level CONFIG to identify HETEROGENUOUS clusters
      (2) CONFIGS for SC3900/DSP components
      (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
          updated for dsp cores and other components
      (3) APIs to get DSP num cores and their Mask like:
              cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
      (5) Code to fetch and print SC cores and other heterogenous
          device's frequencies
      (6) README added for the same
      Signed-off-by: default avatarShaveta Leekha <shaveta@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      b8bf0adc
  23. 12 Feb, 2015 1 commit