1. 16 Sep, 2016 1 commit
  2. 26 Jun, 2016 1 commit
    • Marek Vasut's avatar
      common: Pass the boot device into spl_boot_mode() · 2b1cdafa
      Marek Vasut authored
      The SPL code already knows which boot device it calls the spl_boot_mode()
      on, so pass that information into the function. This allows the code of
      spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
      board_boot_order() correctly alter the behavior of the boot process.
      
      The later one is important, since in certain cases, it is desired that
      spl_boot_device() return value be overriden using board_boot_order().
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Andreas Bießmann <andreas.devel@googlemail.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      Cc: Tom Rini <trini@konsulko.com>
      Reviewed-by: default avatarAndreas Bießmann <andreas@biessmann.org>
      [add newly introduced zynq variant]
      Signed-aff-by: default avatarAndreas Bießmann <andreas@biessmann.org>
      2b1cdafa
  3. 08 Jun, 2016 2 commits
  4. 01 Jun, 2016 1 commit
    • Marek Vasut's avatar
      arm: socfpga: Add samtec VIN|ING board · 569a191a
      Marek Vasut authored
      Add support for board based on the popular Altera Cyclone V SoC.
      This board has the following properties:
       - 1 GiB of DRAM
       - 1 Gigabit ethernet
       - 1 USB gadget port
       - 1 USB host port with an on-board hub
       - 2 QSPI NORs connected to the Cadence QSPI core
       - Multiple I2C EEPROMs and one I2C temperature sensor
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Chin Liang See <clsee@altera.com>
      ---
      V2: Update the defconfig as per Tom's request
      569a191a
  5. 06 May, 2016 1 commit
  6. 10 Apr, 2016 2 commits
    • Marek Vasut's avatar
      arm: socfpga: Nuke useless include · dafd5792
      Marek Vasut authored
      The dwmmc.h include was forgotten during the migration of dwmmc
      probing to DM. Since the shiny DM is in place now, remove this
      relic of the past.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Chin Liang See <clsee@altera.com>
      dafd5792
    • Marek Vasut's avatar
      arm: socfpga: Handle phy-mode OF property for GMACs · 5f79d008
      Marek Vasut authored
      Thus far, the socfpga init code had hard-coded the configuration
      of the ethernet PHY interface to RGMII in the ethernet registers
      in sysmgr space, so PHYs connected in another modes did not work.
      
      This patch fixes support for configurations where the ethernet PHYs
      are connected over MII/GMII/RMII interfaces by parsing the phy-mode
      OF property of the GMACs and configuring the ethernet registers in
      sysmgr space accordingly.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Reported-by: default avatarDenis Bakhvalov <denis.bakhvalov@nokia.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      5f79d008
  7. 24 Feb, 2016 2 commits
    • Marek Vasut's avatar
      arm: socfpga: Fix ethernet reset handling · e6e34ca3
      Marek Vasut authored
      The following patch caused cpu_eth_init() to not be called anymore
      for DM-capable boards:
      
      commit c32a6fd0
      Date:   Sun Jan 17 14:51:56 2016 -0700
          net: Don't call board/cpu_eth_init() with driver model
      
      This breaks ethernet on SoCFPGA, since we use that function to un-reset
      the ethernet blocks. Invoke the ethernet reset function from arch_misc_init()
      instead to fix the breakage.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Denis Bakhvalov <denis.bakhvalov@nokia.com>
      e6e34ca3
    • Marek Vasut's avatar
      arm: socfpga: Remove bashisms from qts filter · 80da8664
      Marek Vasut authored
      Weed out bashisms from the script. The echo -e does not work in dash,
      which is the default /bin/sh in debian .
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dalon Westergreen <dwesterg@gmail.com>
      80da8664
  8. 16 Jan, 2016 1 commit
  9. 22 Dec, 2015 4 commits
  10. 20 Dec, 2015 4 commits
  11. 06 Dec, 2015 2 commits
  12. 30 Nov, 2015 4 commits
  13. 03 Nov, 2015 1 commit
  14. 16 Oct, 2015 1 commit
    • Dinh Nguyen's avatar
      arm: socfpga: enable data/inst prefetch and shared override in the L2 · 8d8e13e1
      Dinh Nguyen authored
      Update the L2 AUX CTRL settings for the SoCFPGA.
      
      Enabling D and I prefetch bits helps improve SDRAM performance on the
      platform.
      
      Also, we need to enable bit 22 of the L2. By not having bit 22 set in the
      PL310 Auxiliary Control register (shared attribute override enable) has the
      side effect of transforming Normal Shared Non-cacheable reads into Cacheable
      no-allocate reads.
      
      Coherent DMA buffers in Linux always have a Cacheable alias via the
      kernel linear mapping and the processor can speculatively load cache
      lines into the PL310 controller. With bit 22 cleared, Non-cacheable
      reads would unexpectedly hit such cache lines leading to buffer
      corruption.
      Signed-off-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
      8d8e13e1
  15. 23 Sep, 2015 1 commit
  16. 04 Sep, 2015 6 commits
  17. 23 Aug, 2015 6 commits
    • Marek Vasut's avatar
      arm: socfpga: Make the pinmux table const u8 · cc9429a5
      Marek Vasut authored
      Now that we're actually converting the QTS-generated header files,
      we can even adjust their data types. A good candidate for this is
      the pinmux table, where each entry can have value in the range of
      0..3, but each element is declared as unsigned long. By changing
      the type to u8, we can save over 600 Bytes from the SPL, so do it.
      This patch also constifies the array.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      cc9429a5
    • Marek Vasut's avatar
      arm: socfpga: Switch to filtered QTS files · f6badb0d
      Marek Vasut authored
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      f6badb0d
    • Marek Vasut's avatar
      arm: socfpga: Add qts-filter.sh script · e996b936
      Marek Vasut authored
      Add script which loads the QTS-generated sources and headers and converts
      them into sensible format which can be used with much more easy in mainline
      U-Boot. The script also filters out macros which makes no sense anymore, so
      they don't pollute namespace and waste space.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      e996b936
    • Marek Vasut's avatar
      arm: socfpga: Split Altera socfpga into AV and CV SoCDK · f0892401
      Marek Vasut authored
      The board/altera/socfpga directory is not a generic SoCFPGA machine
      anymore, but instead it represents the Altera SoCDK board. To make
      matters more complicated, it represents both CycloneV and ArriaV
      variant.
      
      On the other hand, nowadays, the content of this board directory is
      mostly comprised of QTS-generated header files, while all the generic
      code is in arch/arm/mach-socfpga already.
      
      Thus, this patch splits the board/altera/socfpga into a separate
      board directory for ArriaV SoCDK and CycloneV SoCDK, so that each
      can be populated with the correct QTS-generated header files for
      that particular board.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      f0892401
    • Marek Vasut's avatar
      arm: socfpga: Unbind CPU type from board type · cd9b7317
      Marek Vasut authored
      The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
      selected both a board and a CPU. This is not correct as these macros
      are supposed to select only board.
      
      All would be good, if QTS-generated header files didn't check for
      these macros exactly to determine if the platform is Cyclone V or
      Arria V. Thus, for the sake of compatibility with not well fleshed
      out header file generator, this patch makes these two macros into
      a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
      and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
      previous stub config option.
      
      The result is that compatibility with QTS is preserved and the new
      CONFIG_TARGET_* select actual target boards.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      cd9b7317
    • Marek Vasut's avatar
      arm: socfpga: Move wrappers into platform directory · ca62d2e1
      Marek Vasut authored
      Move the wrappers for QTS-generated files into platform directory
      out of the board directory. The trick here is to add -I to CFLAGS
      such that it points to the board directory in source tree and thus
      the qts/ directory there is still reachable.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      ca62d2e1