1. 23 Aug, 2012 2 commits
    • Liu Gang's avatar
      powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro · 81fa73ba
      Liu Gang authored
      When compile the slave image for boot from SRIO, no longer need to
      specify which SRIO port it will boot from. The code will get this
      information from RCW and then finishes corresponding configurations.
      
      This has the following advantages:
      	1. No longer need to rebuild an image when change the SRIO port for
      	   boot from SRIO, just rewrite the new RCW with selected port,
      	   then the code will get the port information by reading new RCW.
      	2. It will be easier to support other boot location options, for
      	   example, boot from PCIE.
      Signed-off-by: default avatarLiu Gang <Gang.Liu@freescale.com>
      Signed-off-by: default avatarAndy Fleming <afleming@freescale.com>
      81fa73ba
    • Liu Gang's avatar
      powerpc/corenet_ds: Get rid of the SRIOBOOT_MASTER build target · ff65f126
      Liu Gang authored
      Get rid of the SRIOBOOT_MASTER build target, and to support for serving as
      a SRIO boot master via environment variable. Set the environment variable
      "bootmaster" to "SRIO1" or "SRIO2" using the following command:
      
      		setenv bootmaster SRIO1
      		saveenv
      
      The "bootmaster" will enable the function of the SRIO boot master, and
      this has the following advantages compared with SRIOBOOT_MASTER build
      configuration:
      	1. Reduce a build configuration item in boards.cfg file.
      	   No longer need to build a special image for master, just use a
      	   normal target image and set the "bootmaster" variable.
      	2. No longer need to rebuild an image when change the SRIO port for
      	   boot from SRIO, just set the corresponding value to "bootmaster"
      	   based on the using SRIO port.
      Signed-off-by: default avatarLiu Gang <Gang.Liu@freescale.com>
      Signed-off-by: default avatarAndy Fleming <afleming@freescale.com>
      ff65f126
  2. 08 Aug, 2012 1 commit
  3. 06 Jul, 2012 1 commit
  4. 20 Jun, 2012 1 commit
  5. 25 Apr, 2012 2 commits
  6. 12 Feb, 2012 1 commit
    • Fabio Estevam's avatar
      sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION option · 4394d0c2
      Fabio Estevam authored
      Since commit 97039ab9 (env_mmc: Allow board code to override the environment address)
      mmc_get_env_addr is a weak-aliased function in common/env_mmc.c
      
      The mmc_get_env_addr implementation that exists at
      board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards,
      but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined.
      
      Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use
      the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate
      this config option on their board file.
      
      This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards.
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
      Acked-by: default avatarKumar Gala <galak@kernel.crashing.org>
      Acked-by: default avatarStefano Babic <sbabic@denx.de>
      4394d0c2
  7. 29 Nov, 2011 2 commits
    • Timur Tabi's avatar
      powerpc/85xx: clean up and document the QE/FMAN microcode macros · f2717b47
      Timur Tabi authored
      Several macros are used to identify and locate the microcode binary image
      that U-boot needs to upload to the QE or Fman.  Both the QE and the Fman
      use the QE Firmware binary format to package their respective microcode data,
      which is why the same macros are used for both.  A given SOC will only have
      a QE or an Fman, so this is safe.
      
      Unfortunately, the current macro definition and usage has inconsistencies.
      For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
      firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
      of NAND.  There's no way to know by looking at a variable how it's supposed
      to be used.
      
      In the future, the code which uploads QE firmware and Fman firmware will
      be merged.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      f2717b47
    • Timur Tabi's avatar
      powerpc/85xx: CONFIG_FSL_SATA_V2 should be defined in config_mpc85xx.h · 3e0529f7
      Timur Tabi authored
      Macro CONFIG_FSL_SATA_V2 is defined if the SOC has a V2 Freescale SATA
      controller, so it should be defined in config_mpc85xx.h instead of the various
      board header files.  So now CONFIG_FSL_SATA_V2 is always defined on the P1013,
      P1022, P2041, P3041, P5010, and P5020.  It was already defined for the
      P1010 and P1014.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      3e0529f7
  8. 21 Oct, 2011 2 commits
  9. 18 Oct, 2011 1 commit
  10. 05 Oct, 2011 1 commit
  11. 03 Oct, 2011 1 commit
  12. 30 Sep, 2011 2 commits
    • Mingkai Hu's avatar
      powerpc/p2041rdb: Add ethernet support on P2041RDB board · 0787ecc0
      Mingkai Hu authored
      Add support for RGMII, SGMII and XAUI Ethernet on P2041RDB board.
      
      The five dTSEC can be routed to two on-board RGMII phy, three on-board
      SGMII phy or four SGMII phy on SGMII riser card according to different
      serdes protocol configuration and board lane configuration. Also updated
      the device tree to direct the Fmac MAC to the correct PHY.
      
      Removed CONFIG_SYS_FMAN_FW as its not used anywhere.
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      0787ecc0
    • Timur Tabi's avatar
      powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros · e46fedfe
      Timur Tabi authored
      Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
      macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
      This is necessary for the assembly-language code that relocates CCSR, since
      the assembler does not understand 64-bit constants.
      
      CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
      CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
      should not be defined in a board header file.  Similarly,
      CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
      it should also not be defined in the board header file.
      
      CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
      CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
      and so CCSR will not be relocated.
      
      Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
      builds (e.g. NAND) are required to relocate CCSR only during the last stage
      (i.e. the "real" U-Boot).  All other stages should define
      CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.
      
      README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
      Signed-off-by: default avatarTimur Tabi <timur@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      e46fedfe
  13. 29 Jul, 2011 2 commits
  14. 17 Jul, 2011 1 commit
    • Mingkai Hu's avatar
      powerpc/p2041rdb: Add p2041rdb board support · 4f1d1b7d
      Mingkai Hu authored
      P2041RDB Specification:
      -----------------------
      Memory subsystem:
       * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
       * 128 Mbyte NOR flash single-chip memory
       * 256 Kbit M24256 I2C EEPROM
       * 16 Mbyte SPI memory
       * SD connector to interface with the SD memory card
      
      Ethernet:
       * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221)
       * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221)
       * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221)
       * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641)
       * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
      
      PCIe:
       * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1
       * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
      
      SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
      
      USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
      
      I2C:
       * I2C1: Real time clock, Temperature sensor, Memory module
       * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
      
      UART: supports two UARTs up to 115200 bps for console
      Signed-off-by: default avatarMingkai Hu <Mingkai.hu@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      4f1d1b7d
  15. 11 Jul, 2011 3 commits
  16. 18 May, 2011 2 commits
  17. 29 Apr, 2011 1 commit
  18. 28 Apr, 2011 2 commits
  19. 27 Apr, 2011 1 commit
    • Kim Phillips's avatar
      common: add a grepenv command · a000b795
      Kim Phillips authored
      u-boot environments, esp. when boards are shared across multiple
      users, can get pretty large and time consuming to visually parse.
      The grepenv command this patch adds can be used in lieu of printenv
      to facilitate searching.  grepenv works like printenv but limits
      its output only to environment strings (variable name and value
      pairs) that match the user specified substring.
      
      the following examples are on a board with a 5313 byte environment
      that spans multiple screen pages:
      
      Example 1:  summarize ethernet configuration:
      
      => grepenv eth TSEC
      etact=FM1@DTSEC2
      eth=FM1@DTSEC4
      ethact=FM1@DTSEC2
      eth1addr=00:E0:0C:00:8b:01
      eth2addr=00:E0:0C:00:8b:02
      eth3addr=00:E0:0C:00:8b:03
      eth4addr=00:E0:0C:00:8b:04
      eth5addr=00:E0:0C:00:8b:05
      eth6addr=00:E0:0C:00:8b:06
      eth7addr=00:E0:0C:00:8b:07
      eth8addr=00:E0:0C:00:8b:08
      eth9addr=00:E0:0C:00:8b:09
      ethaddr=00:E0:0C:00:8b:00
      netdev=eth0
      uprcw=setenv ethact $eth;setenv filename p4080ds/R_PPSXX_0xe/rcw_0xe_2sgmii_rev2_high.bin;setenv start 0xe8000000;protect off all;run upimage;protect on all
      upuboot=setenv ethact $eth;setenv filename u-boot.bin;setenv start eff80000;protect off all;run upimage;protect on all
      upucode=setenv ethact $eth;setenv filename fsl_fman_ucode_P4080_101_6.bin;setenv start 0xef000000;protect off all;run upimage;protect on all
      usdboot=setenv ethact $eth;tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/initramfs.cpio.gz.uboot;tftp c00000 $dir/p4080ds-usdpaa.dtb;setenv bootargs root=/dev/ram rw console=ttyS0,115200 $othbootargs;bootm 1000000 2000000 c00000;
      =>
      
      Example 2: detect unused env vars:
      
      => grepenv etact
      etact=FM1@DTSEC2
      =>
      
      Example 3: reveal hardcoded variables; e.g., for fdtaddr:
      
      => grepenv fdtaddr
      fdtaddr=c00000
      nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr
      ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr
      => grep $fdtaddr
      fdtaddr=c00000
      my_boot=bootm 0x40000000 0x41000000 0x00c00000
      my_dtb=tftp 0x00c00000 $prefix/p4080ds.dtb
      nohvboot=tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/$ramdiskfile;tftp c00000 $dir/$fdtfile;setenv bootargs root=/dev/ram rw ramdisk_size=0x10000000 console=ttyS0,115200;bootm 1000000 2000000 c00000;
      =>
      
      This patch also enables the grepenv command by default on
      corenet_ds based boards (and repositions the DHCP command
      entry to keep the list sorted).
      Signed-off-by: default avatarKim Phillips <kim.phillips@freescale.com>
      Cc: Kumar Gala <kumar.gala@freescale.com>
      Cc: Andy Fleming <afleming@freescale.com>
      a000b795
  20. 10 Apr, 2011 1 commit
  21. 09 Apr, 2011 1 commit
  22. 04 Apr, 2011 1 commit
  23. 20 Jan, 2011 3 commits
  24. 14 Jan, 2011 3 commits
  25. 12 Nov, 2010 2 commits