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    • Peng Fan's avatar
      imx: mx7d: isolate resources to domain 0 for A7 core · 35c4ce5e
      Peng Fan authored
      In current design, if any peripheral was assigned to both A7 and M4,
      it will receive ipg_stop or ipg_wait when any of the 2 platforms
      enter low power mode. We will have a risk that, if A7 enter wait,
      M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
      asserted same time. Also if M4 enters stop mode, A7 will have no
      chance to access the peripheral.
      There are 26 peripherals affected by this IC issue:
      SIM2(sim2/emvsim2)
      SIM1(sim1/emvsim1)
      UART1/UART2/UART3/UART4/UART5/UART6/UART7
      SAI1/SAI2/SAI3
      WDOG1/WDOG2/WDOG3/WDOG4
      GPT1/GPT2/GPT3/GPT4
      PWM1/PWM2/PWM3/PWM4
      ENET1/ENET2
      Software Workaround:
      The solution is to set the peripherals to Domain0 by A core, since A core
      in Domain0. The peripherals which will be used by M4, will be set to Domain1
      by M4.
      For example, A core set WDOG4 to domain0, but when M4 boots up, M4 will
      set WDOG4 to domain1, because M4 will use WDOG4.
      
      So the peripherals are not shared by them. This way requires
      the uboot implemented the RDC driver and set the 26 IPs above
      to domain 0 only. M4 image will set the M4 to domain 1 and
      set peripheral which it will use to domain 1.
      
      This patch enables the CONFIG_IMX_RDC and CONFIG_IMX_BOOTAUX for
      i.MX7D SABRESD board, and setup the 26 IP resources to domain 0.
      Signed-off-by: default avatarYe.Li <ye.li@nxp.com>
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      35c4ce5e
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