1. 24 Apr, 2016 2 commits
  2. 31 Mar, 2016 5 commits
  3. 23 Mar, 2016 1 commit
  4. 08 Mar, 2016 2 commits
    • Masahiro Yamada's avatar
      pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER · 1d22c4b1
      Masahiro Yamada authored
      CONFIG_PINCTRL_UNIPHIER is more suitable than CONFIG_ARCH_UNIPHIER
      to guard the drivers/pinctrl/uniphier directory.
      
      The current CONFIG_PINCTRL_UNIPHIER_CORE is a bit long, so rename it
      into CONFIG_PINCTRL_UNIPHIER.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      1d22c4b1
    • Masahiro Yamada's avatar
      pinctrl: uniphier: set input-enable before pin-muxing · fdd15b6a
      Masahiro Yamada authored
      While IECTRL is disabled, input signals are pulled-down internally.
      If pin-muxing is set up first, glitch signals (Low to High transition)
      might be input to hardware blocks.
      
      Bad case scenario:
      [1] The hardware block is already running before pinctrl is handled.
         (the reset is de-asserted by default or by a firmware, for example)
      [2] The pin-muxing is set up.  The input signals to hardware block
         are pulled-down by the chip-internal biasing.
      [3] The pins are input-enabled.  The signals from the board reach the
          hardware block.
      
      Actually, one invalid character is input to the UART blocks for such
      SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
      power on reset.
      
      To avoid such problems, pins should be input-enabled before muxing.
      
      [ ported from Linux commit bac7f4c1bf5e7c6ccd5bb71edc015b26c77f7460 ]
      
      Fixes: 5dc626f8 ("pinctrl: uniphier: add UniPhier pinctrl core support")
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      fdd15b6a
  5. 21 Feb, 2016 2 commits
    • Peng Fan's avatar
      pinctrl: imx: Support i.MX7D · c4068dfb
      Peng Fan authored
      Introudce i.MX7 pinctrl driver support.
      For now only i.MX7D supported.
      There are two iomux controllers in i.MX7D, iomuxc and iomuxc_lpsr.
      To iomuxc_lpsr, ZERO_OFFSET_VALID is set, means offset of mux_reg
      and conf_reg can begin at 0.
      Signed-off-by: default avatarPeng Fan <van.freenix@gmail.com>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
      c4068dfb
    • Peng Fan's avatar
      pinctrl: imx: Introduce pinctrl driver for i.MX6 · 745df68d
      Peng Fan authored
      Introduce pinctrl for i.MX6
      1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
      2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
      3. To the pinctrl_ops implementation, only set_state is implemented.
         To i.MX6/7, the pinctrl dts entry is as following:
      &iomuxc {
              pinctrl-names = "default";
      
              pinctrl_csi1: csi1grp {
                      fsl,pins = <
                      MX6UL_PAD_CSI_MCLK__CSI_MCLK            0x1b088
                      MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK        0x1b088
                      MX6UL_PAD_CSI_VSYNC__CSI_VSYNC          0x1b088
                      >;
              };
      
              [.....]
      };
        there is no property named function or groups. So pinctrl_generic_set_state
        can not be used here.
      5. This driver is a simple implementation for i.mx iomux controller,
         only parse the fsl,pins property and write value to registers.
      6. With DEBUG enabled, we can see log when "i2c bus 0":
         "
         set_state_simple op missing
         imx_pinctrl_set_state: i2c1grp
         mux_reg 0x14c, conf_reg 0x3bc, input_reg 0x5d8, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
         write mux: offset 0x14c val 0x10
         select_input: offset 0x5d8 val 0x1
         write config: offset 0x3bc val 0x7f
         mux_reg 0x148, conf_reg 0x3b8, input_reg 0x5d4, mux_mode 0x0, input_val 0x1, config_val 0x4000007f
         write mux: offset 0x148 val 0x10
         select_input: offset 0x5d4 val 0x1
         write config: offset 0x3b8 val 0x7f
         "
         this means imx6 pinctrl driver works as expected.
      Signed-off-by: default avatarPeng Fan <van.freenix@gmail.com>
      Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
      745df68d
  6. 01 Feb, 2016 1 commit
  7. 25 Jan, 2016 1 commit
  8. 22 Jan, 2016 8 commits
  9. 21 Jan, 2016 1 commit
  10. 01 Dec, 2015 1 commit
  11. 10 Nov, 2015 1 commit
    • Tom Rini's avatar
      Various Makefiles: Add SPDX-License-Identifier tags · da58dec8
      Tom Rini authored
      After consulting with some of the SPDX team, the conclusion is that
      Makefiles are worth adding SPDX-License-Identifier tags too, and most of
      ours have one.  This adds tags to ones that lack them and converts a few
      that had full (or in one case, very partial) license blobs into the
      equivalent tag.
      
      Cc: Kate Stewart <kstewart@linuxfoundation.org>
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      da58dec8
  12. 24 Sep, 2015 7 commits
  13. 23 Sep, 2015 1 commit
  14. 19 Sep, 2015 1 commit
    • Masahiro Yamada's avatar
      pinctrl: move dm_scan_fdt_node() out of pinctrl uclass · 8a5f6129
      Masahiro Yamada authored
      Commit c5acf4a2 ("pinctrl: Add the concept of peripheral IDs")
      added some additional change that was not mentioned in the git-log.
      
      That commit added dm_scan_fdt_node() in the pinctrl uclass binding.
      It should be handled by the simple-bus driver or the low-level
      driver, not by the pinctrl framework.
      
      I guess Simon's motivation was to bind GPIO banks located under the
      Rockchip pinctrl device.  It is true some chips have sub-devices
      under their pinctrl devices, but it is basically SoC-specific matter.
      
      This commit partly reverts commit c5acf4a2 to keep the only
      pinctrl-generic features in the uclass.  The dm_scan_fdt_node()
      should be called from the rk3288_pinctrl driver.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      Tested-by: default avatarSimon Glass <sjg@chromium.org>
      8a5f6129
  15. 03 Sep, 2015 3 commits
    • Simon Glass's avatar
      rockchip: rk3288: Add pinctrl driver · bb4e4a5d
      Simon Glass authored
      Add a driver which supports pin multiplexing setup for the most commonly
      used peripherals.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      bb4e4a5d
    • Simon Glass's avatar
      pinctrl: Add the concept of peripheral IDs · c5acf4a2
      Simon Glass authored
      My original pinctrl patch operating using a peripheral ID enum. This was
      shared between pinmux and clock and provides an easy way to specify a device
      that needs to be controlled, even it is does not (yet) have a driver within
      driver model.
      
      Masahiro's new simple pinctrl gets around this by providing a
      set_state_simple() pinctrl method. By passing a device to that call the
      peripheral ID becomes unnecessary. If the driver needs it, it can calculate
      it itself and use it internally.
      
      However this does not solve the problem for peripheral clocks. The 'pure'
      solution would be to pass a driver to the clock uclass also. But this
      requires that all devices should have a driver, and a struct udevide. Also
      a key optimisation of the clock uclass is allowing a peripheral clock to
      be set even when there is no device for that clock.
      
      There may be a better way to achive the same goal, but for now it seems
      expedient to add in peripheral ID to the pinctrl uclass. Two methods are
      added - one to get the peripheral ID and one to select it. The existing
      set_state_simple() is effectively the union of these.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      c5acf4a2
    • Simon Glass's avatar
      pinctrl: Add help text to Kconfig · 458a0700
      Simon Glass authored
      The pinctrl Kconfig options should have help messages. Add this to a few
      options.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      458a0700
  16. 31 Aug, 2015 2 commits
    • Masahiro Yamada's avatar
      pinctrl: sandbox: add sandbox pinctrl driver · 9c6a3c67
      Masahiro Yamada authored
      This driver actually does nothing but test pinctrl uclass, and
      demonstrate how things work.
      
      To try this driver, uncomment /* #define DEBUG */ in the
      drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
      displayed.
      
        DRAM:  128 MiB
        sandbox pinmux: group = 1 (serial_a), function = 1 (serial)
        Using default environment
      
        In:    cros-ec-keyb
        Out:   lcd
        Err:   lcd
        Net:   Net Initialization Skipped
        eth0: eth@10002000, eth1: eth@80000000, eth5: eth@90000000
        => i2c dev 0
        Setting bus to 0
        sandbox pinmux: group = 0 (i2c), function = 0 (i2c)
        sandbox pinconf: group = 0 (i2c), param = 3, arg = 1
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      9c6a3c67
    • Masahiro Yamada's avatar
      pinctrl: add pin control uclass support · d90a5a30
      Masahiro Yamada authored
      This creates a new framework for handling of pin control devices,
      i.e. devices that control different aspects of package pins.
      
      This uclass handles pinmuxing and pin configuration; pinmuxing
      controls switching among silicon blocks that share certain physical
      pins, pin configuration handles electronic properties such as pin-
      biasing, load capacitance etc.
      
      This framework can support the same device tree bindings, but if you
      do not need full interface support, you can disable some features to
      reduce memory foot print.  Typically around 1.5KB is necessary to
      include full-featured uclass support on ARM board (CONFIG_PINCTRL +
      CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
      for example.
      
      We are often limited on code size for SPL.  Besides, we still have
      many boards that do not support device tree configuration.  The full
      pinctrl, which requires OF_CONTROL, does not make sense for those
      boards.  So, this framework also has a Do-It-Yourself (let's say
      simple pinctrl) interface.  With CONFIG_PINCTRL_FULL disabled, the
      uclass itself provides no systematic mechanism for identifying the
      peripheral device, applying pinctrl settings, etc.  They must be
      done in each low-level driver.  In return, you can save much memory
      footprint and it might be useful especially for SPL.
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      d90a5a30