1. 24 May, 2015 1 commit
  2. 31 Mar, 2015 1 commit
  3. 13 Jan, 2015 1 commit
    • Daniel Mack's avatar
      mtd: OMAP: Enable GPMC prefetch mode · c316f577
      Daniel Mack authored
      Enable GPMC's prefetch feature for NAND access. This speeds up NAND read
      access a lot by pre-fetching contents in the background and reading them
      through the FIFO address.
      
      The current implementation has two limitations:
      
       a) it only works in 8-bit mode
       b) it only supports read access
      
      Both is easily fixable by someone who has hardware to implement it.
      
      Note that U-Boot code uses non word-aligned buffers to read data into, and
      request read lengths that are not multiples of 4, so both partial buffers
      (head and tail) have to be addressed.
      
      Tested on AM335x hardware.
      Tested-by: default avatarGuido Martínez <guido@vanguardiasur.com.ar>
      Reviewed-by: default avatarGuido Martínez <guido@vanguardiasur.com.ar>
      Signed-off-by: default avatarDaniel Mack <zonque@gmail.com>
      [trini: Make apply again, use 'cs' fix pointed out by Guido]
      Signed-off-by: default avatarTom Rini <trini@ti.com>
      c316f577
  4. 05 Oct, 2014 1 commit
  5. 25 Sep, 2014 1 commit
  6. 25 Jul, 2014 1 commit
    • pekon gupta's avatar
      ARM: omap: move board specific NAND configs out from ti_armv7_common.h · 434f2cfc
      pekon gupta authored
      This patch moves some board specific NAND configs:
      - FROM: generic config file 'ti_armv7_common.h'
      - TO:   individual board config files using these configs.
      So that each board can independently set the value as per its design.
      
      Following configs are affected in this patch:
        CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand>
        CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon>
        CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon>
        CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon>
      
      This patch also updates documentation for few of above NAND configs.
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      434f2cfc
  7. 06 Jun, 2014 2 commits
    • pekon gupta's avatar
      am335x: update README for BCH16 · 867f0304
      pekon gupta authored
      updates documentation with explanation on how to select ECC schemes.
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      867f0304
    • pekon gupta's avatar
      mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width · b80a6603
      pekon gupta authored
      GPMC controller needs to be configured based on bus-width of the NAND device
      connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI
      parameters is not possible in following situations:
      SPL:    SPL NAND drivers does not support ONFI parameter reading.
      U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init()
              which is called before probing for devices, hence any ONFI parameter
              information is not available during GPMC initialization.
      
      Thus, OMAP NAND driver expected board developers to explicitely write GPMC
      configurations specific to NAND device attached on board in board files itself.
      But this was troublesome for board manufacturers as they need to dive into
      lengthy platform & SoC documents to find details of GPMC registers and
      appropriate configurations to get NAND device working.
      
      This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config
      hich indicates that connected NAND device has x16 bus-width. And then based on
      this config GPMC driver itself initializes itself based on NAND bus-width. This
      keeps board developers free from knowing GPMC controller specific internals.
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      b80a6603
  8. 21 Nov, 2013 4 commits
    • pekon gupta's avatar
      mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme · 3f719069
      pekon gupta authored
      This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
      CONFIG_xx used for selecting NAND ecc-schemes.
      This patch aims at solving following issues.
      
      1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
         other ecc-schemes also supported in hardware. like;
       - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
         the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
         software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
       - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
         supports BCH16 ecc-scheme also.
      
      2) Different platforms use different CONFIG_xx to select ecc-schemes, which
         adds confusion for user while migrating platforms.
       - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
          8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
          whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
          and BCH16 (in future).
       - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
          correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
       - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library
      
      Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
      on SoC platform and NAND driver. And user can select ecc-scheme independently
      foreach board.
      However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
      depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      3f719069
    • pekon gupta's avatar
      mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform · d016dc42
      pekon gupta authored
      BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours
      +-----------------------------------+-----------------+-----------------+
      |ECC Scheme                         | ECC Calculation | Error Detection |
      +-----------------------------------+-----------------+-----------------+
      |OMAP_ECC_BCH8_CODE_HW              |GPMC             |ELM H/W engine   |
      |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC             |S/W BCH library  |
      +-----------------------------------+-----------------+-----------------+
      
      Current implementation limits the BCH8_CODE_HW only for AM33xx device family.
      (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have
      ELM hardware module, and can support ECC error detection using ELM.
      
      This patch
      - removes CONFIG_AM33xx
      	Thus this driver can be reused by all devices having ELM h/w engine.
      - adds omap_select_ecc_scheme()
      	A common function to handle ecc-scheme related configurations. This
      	can be used both during device-probe and via user-space u-boot commads
      	to change ecc-scheme. During device probe ecc-scheme is selected based
      	on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8
      - enables CONFIG_BCH
      	S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW
        	is enabled by CONFIG_BCH.
      - enables CONFIG_SYS_NAND_ONFI_DETECTION
      	for auto-detection of ONFI compliant NAND devices
      - updates following README doc
      	doc/README.nand
      	board/ti/am335x/README
      	doc/README.omap3
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      [scottwood@freescale.com: fixed unused variable warning]
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      d016dc42
    • pekon gupta's avatar
      mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms · beba5f04
      pekon gupta authored
      ELM hardware engine which is used for ECC error detection, is present on all
      latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM
      driver should be moved to common drivers/mtd/nand/ folder so that all SoC
      having on-chip ELM hardware engine can re-use it.
      This patch has following changes:
      - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h
      - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c
      - update Makefiles
      - update #include <asm/elm.h>
      - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c
      	and include in all board configs using AM33xx SoC platform.
      Signed-off-by: default avatarPekon Gupta <pekon@ti.com>
      beba5f04
    • Prabhakar Kushwaha's avatar
      mtd: move & update nand_ecclayout structure (plus board changes) · 68ec9c85
      Prabhakar Kushwaha authored
      nand_ecclayout is present in mtd.h at Linux.
      Move this structure to mtd.h to comply with Linux.
      
      Also, increase the ecc placement locations to 640 to suport device having
      writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
      up to 640 bytes and consequently the maximum ecc placement locations have
      also gone up to 640.
      
      Changes from Prabhabkar's version (squashed into one patch to preserve
      bisectability):
       - Added _LARGE to MTD_MAX_*_ENTRIES
      
         This makes the names match current Linux source, and resolves
         a conflict between
         http://patchwork.ozlabs.org/patch/280488/
         and
         http://patchwork.ozlabs.org/patch/284513/
      
         The former was posted first and is closer to matching Linux, but
         unlike Linux it does not add _LARGE to the names.  The second adds
         _LARGE to one of the names, and depends on it in a subsequent patch
         (http://patchwork.ozlabs.org/patch/284512/).
      
       - Made max oobfree/eccpos configurable, and used this on tricorder,
         alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build
         for me without doing so, due to a size increase).
      
         On tricorder SPL, this saves 2576 bytes (and makes the SPL build
         again) versus the new default of 640 eccpos and 32 oobfree, and
         saves 336 bytes versus the old default of 128 eccpos and 8 oobfree.
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      CC: Vipin Kumar <vipin.kumar@st.com>
      [scottwood@freescale.com: changes as described above]
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      Cc: Thomas Weber <weber@corscience.de>
      Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: York Sun <yorksun@freescale.com>
      Cc: Tom Rini <trini@ti.com>
      Reviewed-by: default avatarStefan Roese <sr@denx.de>
      68ec9c85
  9. 24 Jul, 2013 1 commit
  10. 26 Nov, 2012 1 commit
  11. 17 Sep, 2012 1 commit
  12. 18 May, 2012 1 commit
  13. 26 Jan, 2012 1 commit
    • Scott Wood's avatar
      nand: Introduce CONFIG_SYS_NAND_SELF_INIT · 578931b3
      Scott Wood authored
      This allows a driver to run code between nand_scan_ident() and
      nand_scan_tail(), among other things.  See the additions to
      doc/README.nand for details.
      
      To allow a gradual transition, Boards that don't set
      CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but
      new drivers should not require this, and existing drivers should be
      converted when convenient.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      578931b3
  14. 03 Oct, 2011 1 commit
  15. 01 Jul, 2011 1 commit
  16. 17 Jul, 2009 1 commit
    • Scott Wood's avatar
      Remove legacy NAND and disk on chip code. · be33b046
      Scott Wood authored
      Legacy NAND had been scheduled for removal.  Any boards that use this
      were already not building in the previous release due to an #error.
      
      The disk on chip code in common/cmd_doc.c relies on legacy NAND,
      and it has also been removed.  There is newer disk on chip code
      in drivers/mtd/nand; someone with access to hardware and sufficient
      time and motivation can try to get that working, but for now disk
      on chip is not supported.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      be33b046
  17. 07 Jul, 2009 1 commit
    • David Brownell's avatar
      davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) · 6e29ed8e
      David Brownell authored
      Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
      it's also unused by any current boards, and doesn't even match the
      main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
      on newer chips that support it).
      
      DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
      match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
      do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
      and 5.0/2.6.18) do ... but only for small pages.  Large page support
      is really broken (and it's unclear just what software it was trying
      to match!), and the ECC layout was making three more bytes available
      for use by filesystem (or whatever) code.
      
      Since this option itself seems broken, remove it.  Add a comment
      about the MV/TI compat issue, and the most straightforward way to
      address it (should someone really need to solve it).
      Signed-off-by: default avatarDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      6e29ed8e
  18. 03 Apr, 2009 1 commit
    • Scott Wood's avatar
      Noisily disable the legacy NAND subsystem. · 99067b08
      Scott Wood authored
      Legacy NAND is marked for feature removal after April 2009 (i.e. this
      upcoming release).  There are still several boards that reference it
      (though many do so only for disk-on-chip support which has been silently
      disabled for a while now).  These boards will now fail to build
      with #error, though the code is still there if the user removes #error.
      
      The plan is to remove the code outright in the next release, along with
      any board code that refers to it (such as board/esd/common/auto_update.c).
      
      Also, remove the legacy NAND API description from README.nand.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      99067b08
  19. 23 Jan, 2009 1 commit
  20. 18 Oct, 2008 1 commit
  21. 10 Sep, 2008 1 commit
    • Hugo Villeneuve's avatar
      ARM DaVinci: Fix broken HW ECC for large page NAND. · 9b05aa78
      Hugo Villeneuve authored
      Based on original patch by Bernard Blackham <bernard@largestprime.net>
      
      U-boot's HW ECC support for large page NAND on Davinci is completely
      broken.  Some kernels, such as the 2.6.10 one supported by
      MontaVista for DaVinci, rely upon this broken behaviour as they
      share the same code for ECCs. In the existing scheme, error
      detection *might* work on large page, but error correction
      definitely does not.  Small page ECC correction works, but the
      format is not compatible with the mainline git kernel.
      
      This patch adds ECC code that matches what is currently in the
      Davinci git repository (since NAND support was added in 2.6.24).
      This makes the ECC and OOB layout written by u-boot compatible with
      Linux for both small page and large page devices and fixes ECC
      correction for large page devices.
      
      The old behaviour can be restored by defining the macro
      CFG_DAVINCI_BROKEN_ECC, which is undefined by default.
      Signed-off-by: default avatarHugo Villeneuve <hugo.villeneuve@lyrtech.com>
      Acked-by: default avatarSergey Kubushyn <ksi@koi8.net>
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      9b05aa78
  22. 12 Aug, 2008 2 commits
  23. 09 Jan, 2008 1 commit
  24. 10 Jul, 2007 1 commit
  25. 23 Apr, 2007 1 commit
  26. 28 Oct, 2006 1 commit
  27. 18 Oct, 2006 1 commit
  28. 10 Oct, 2006 1 commit
    • Stefan Roese's avatar
      * Several improvements to the new NAND subsystem: · 2255b2d2
      Stefan Roese authored
        - JFFS2 related commands implemented in mtd-utils style
        - Support for bad blocks
        - Bad block testing commands
        - NAND lock commands
        Please take a look at doc/README.nand for more details
        Patch by Guido Classen, 10 Oct 2006
      2255b2d2
  29. 06 Mar, 2006 1 commit
  30. 27 Jun, 2003 1 commit
    • wdenk's avatar
      * Code cleanup: · 8bde7f77
      wdenk authored
        - remove trailing white space, trailing empty lines, C++ comments, etc.
        - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
      
      * Patches by Kenneth Johansson, 25 Jun 2003:
        - major rework of command structure
          (work done mostly by Michal Cendrowski and Joakim Kristiansen)
      8bde7f77
  31. 31 May, 2003 1 commit
    • wdenk's avatar
      * Patch by Marc Singer, 29 May 2003: · 7a8e9bed
      wdenk authored
        Fixed rarp boot method for IA32 and other little-endian CPUs.
      
      * Patch by Marc Singer, 28 May 2003:
        Added port I/O commands.
      
      * Patch by Matthew McClintock, 28 May 2003
        - cpu/mpc824x/start.S: fix relocation code when booting from RAM
        - minor patches for utx8245
      
      * Patch by Daniel Engström, 28 May 2003:
        x86 update
      
      * Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
        add nand flash support to SXNI855T configuration
        fix/extend nand flash support:
        - fix 'nand erase' command so does not erase bad blocks
        - fix 'nand write' command so does not write to bad blocks
        - fix nand_probe() so handles no flash detected properly
        - add doc/README.nand
        - add .jffs2 and .oob options to nand read/write
        - add 'nand bad' command to list bad blocks
        - add 'clean' option to 'nand erase' to write JFFS2 clean markers
        - make NAND read/write faster
      
      * Patch by Rune Torgersen, 23 May 2003:
        Update for MPC8266ADS board
      7a8e9bed