1. 20 Apr, 2016 2 commits
  2. 10 Apr, 2016 1 commit
  3. 25 Mar, 2016 1 commit
  4. 14 Mar, 2016 2 commits
    • Simon Glass's avatar
      Kconfig: Move CONFIG_FIT and related options to Kconfig · 73223f0e
      Simon Glass authored
      There are already two FIT options in Kconfig but the CONFIG options are
      still in the header files. We need to do a proper move to fix this.
      
      Move these options to Kconfig and tidy up board configuration:
      
         CONFIG_FIT
         CONFIG_OF_BOARD_SETUP
         CONFIG_OF_SYSTEM_SETUP
         CONFIG_FIT_SIGNATURE
         CONFIG_FIT_BEST_MATCH
         CONFIG_FIT_VERBOSE
         CONFIG_OF_STDOUT_VIA_ALIAS
         CONFIG_RSA
      
      Unfortunately the first one is a little complicated. We need to make sure
      this option is not enabled in SPL by this change. Also this option is
      enabled automatically in the host builds by defining CONFIG_FIT in the
      image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
      be used in files that are built on the host but must also build for U-Boot
      and SPL.
      
      Note: Masahiro's moveconfig.py script is amazing.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      [trini: Add microblaze change, various configs/ re-applies]
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      73223f0e
    • Simon Glass's avatar
      Correct defconfig ordering · 4edb9458
      Simon Glass authored
      Various boards have the wrong Kconfig ordering now. To avoid a misleading
      
      diff in the next patch, reorder the configuration correctly.
      Signed-off-by: default avatarSimon Glass <sjg@chromium.org>
      4edb9458
  5. 13 Jan, 2016 1 commit
  6. 22 Dec, 2015 2 commits
  7. 20 Dec, 2015 1 commit
    • Marek Vasut's avatar
      arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded data · 70311e69
      Marek Vasut authored
      This patch adds the necessary OF alias for the UDC node, which let's
      the code locate the DWC2 UDC base address in OF instead of hard-coding
      it into the U-Boot binary. The code is adjusted to use the address from
      OF instead of the hard-coded one. Finally, the hard-coded address is
      removed and USB DM support is enabled.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Lukasz Majewski <l.majewski@majess.pl>
      Cc: Lukasz Majewski <l.majewski@samsung.com>
      70311e69
  8. 06 Dec, 2015 1 commit
    • Marek Vasut's avatar
      arm: socfpga: Enable CONFIG_DM_MMC · 540fcbca
      Marek Vasut authored
      Enable driver model MMC support on SoCFPGA.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Chin Liang See <clsee@altera.com>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Tom Rini <trini@konsulko.com>
      540fcbca
  9. 25 Nov, 2015 2 commits
  10. 22 Nov, 2015 1 commit
  11. 18 Nov, 2015 1 commit
  12. 28 Sep, 2015 1 commit
  13. 23 Aug, 2015 3 commits
    • Marek Vasut's avatar
      arm: socfpga: Enable ethernet on ArriaV SoCDK · 9238b52a
      Marek Vasut authored
      Synchronise the config options with Cyclone V SoCDK and other boards.
      This enables ethernet on the ArriaV SoCDK.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      9238b52a
    • Marek Vasut's avatar
      arm: socfpga: Enable DWAPB GPIO driver · 1bd57ff5
      Marek Vasut authored
      Enable the DWAPB GPIO driver for SoCFPGA Cyclone V and Arria V.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      Cc: Simon Glass <sjg@chromium.org>
      Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
      1bd57ff5
    • Marek Vasut's avatar
      arm: socfpga: Unbind CPU type from board type · cd9b7317
      Marek Vasut authored
      The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
      selected both a board and a CPU. This is not correct as these macros
      are supposed to select only board.
      
      All would be good, if QTS-generated header files didn't check for
      these macros exactly to determine if the platform is Cyclone V or
      Arria V. Thus, for the sake of compatibility with not well fleshed
      out header file generator, this patch makes these two macros into
      a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
      and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
      previous stub config option.
      
      The result is that compatibility with QTS is preserved and the new
      CONFIG_TARGET_* select actual target boards.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      cd9b7317
  14. 21 Aug, 2015 1 commit
  15. 18 Aug, 2015 1 commit
  16. 08 Aug, 2015 3 commits
  17. 26 Jun, 2015 2 commits
  18. 01 Jun, 2015 2 commits
  19. 12 May, 2015 1 commit
  20. 10 May, 2015 1 commit
  21. 07 May, 2015 1 commit
  22. 18 Apr, 2015 1 commit
  23. 15 Mar, 2015 1 commit
  24. 05 Mar, 2015 1 commit
  25. 04 Mar, 2015 2 commits