1. 12 Feb, 2015 1 commit
  2. 22 Jan, 2015 2 commits
  3. 19 Jan, 2015 1 commit
  4. 08 Jan, 2015 1 commit
    • Peng Fan's avatar
      imx:mx6sxsabresd support qspi AHB read · adc0fabf
      Peng Fan authored
      Add CONFIG_SYS_FSL_QSPI_AHB in header file to enable AHB in driver.
      In order to count the time, add CONFIG_CMD_TIME.
      
      Using AHB read can improve the the read speed about 30%.
      
      AHB read:
      => time sf read 0x8f800000 0 100000
      SF: 1048576 bytes @ 0x0 Read: OK
      time: 0.174 seconds
      
      => time sf read 0x8f800000 1000000 100000
      SF: 1048576 bytes @ 0x1000000 Read: OK
      time: 0.174 seconds
      
      IP read:
      => time sf read 0x8f800000 0 100000
      SF: 1048576 bytes @ 0x0 Read: OK
      time: 0.227 seconds
      
      => time sf read 0x8f800000 1000000 100000
      SF: 1048576 bytes @ 0x1000000 Read: OK
      time: 0.227 seconds
      
      Note:
      Quad read is not supported in driver, now. In my side, using AHB and Quad read
      can achieve about 16MB/s. Anyway, I have plan to reimplement the driver using
      DTB and DM, then make the code cleaner and more feature can be added.
      Signed-off-by: 's avatarPeng Fan <Peng.Fan@freescale.com>
      Reviewed-by: 's avatarJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
      adc0fabf
  5. 07 Jan, 2015 1 commit
  6. 31 Dec, 2014 1 commit
    • Peng Fan's avatar
      imx:mx6sxsabresd add qspi support · fad7d735
      Peng Fan authored
      Configure the pad setting and enable qspi clock to support qspi
      flashes access.
      
      Add QSPI related macro in configuration header file.
      
      Note:
      mx6sxsabresd Revb board, 32M flash is used, but in header file,
      CONFIG_SPI_FLASH_BAR is not defined, and we still use SZ_16M.
      The LUT initialization qspi_set_lut function uses 32BIT addr,
      however CONFIG_SPI_FLASH_BAR  and 24BIT addr should be used to
      access bigger than 16MB size flash, and BRRD/BRWR should also
      be supported. Future patches will fix this.
      Signed-off-by: 's avatarPeng Fan <Peng.Fan@freescale.com>
      Reviewed-by: 's avatarJagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
      fad7d735
  7. 01 Dec, 2014 1 commit
  8. 20 Nov, 2014 1 commit
  9. 14 Nov, 2014 1 commit
    • Peng Fan's avatar
      imx:mx6sxsabresd add board level support for usb · a511a3e0
      Peng Fan authored
      Add pinmux settings, implement board_ehci_hcd_init, board_usb_phy_mode
      
      There are two usb port on mx6sxsabresd board:
      1. otg port
      2. host port
      The following are the connection between usb controller and board usb
      interface, host port has not ID pin set:
      otg1 core <---> board otg port
      otg2 core <---> board host port
      In order to make host port work, board_usb_phy_mode return USB_INIT_HOST
      to make host port work in HOST mode.
      Signed-off-by: 's avatarPeng Fan <Peng.Fan@freescale.com>
      Signed-off-by: 's avatarYe Li <B37916@freescale.com>
      a511a3e0
  10. 06 Oct, 2014 1 commit
  11. 16 Sep, 2014 1 commit
  12. 09 Sep, 2014 1 commit
    • Fabio Estevam's avatar
      mx6sxsabresd: Add PCI support · c860eed1
      Fabio Estevam authored
      Tested with an Intel Wireless PCI 7260HMW card:
      
      U-Boot 2014.10-rc1-16576-g4a8a8a8-dirty (Aug 23 2014 - 16:05:11)
      
      CPU:   Freescale i.MX6SX rev1.0 at 792 MHz
      Reset cause: WDOG
      Board: MX6SX SABRE SDB
      I2C:   ready
      DRAM:  1 GiB
      MMC:   FSL_SDHC: 0
        00:01.0     - 16c3:abcd - Bridge device
         01:00.0    - 8086:08b1 - Network controller
      Signed-off-by: 's avatarFabio Estevam <fabio.estevam@freescale.com>
      c860eed1
  13. 20 Aug, 2014 1 commit
  14. 23 Jul, 2014 1 commit
  15. 10 Jul, 2014 1 commit
  16. 28 Apr, 2014 1 commit
  17. 04 Mar, 2014 1 commit
  18. 11 Feb, 2014 2 commits
  19. 13 Jan, 2014 1 commit
  20. 04 Nov, 2013 2 commits
  21. 20 Sep, 2013 1 commit
  22. 24 Jul, 2013 1 commit
  23. 12 Jul, 2013 1 commit
  24. 03 Jun, 2013 1 commit
  25. 22 Apr, 2013 1 commit
  26. 03 Apr, 2013 2 commits
  27. 20 Mar, 2013 1 commit
  28. 07 Mar, 2013 1 commit
  29. 12 Feb, 2013 1 commit
  30. 28 Jan, 2013 1 commit
  31. 13 Jan, 2013 2 commits
  32. 05 Jan, 2013 1 commit
    • Shawn Guo's avatar
      mx6qsabresd: add usdhc2 and usdhc4 support · de7d02ae
      Shawn Guo authored
      The on-board number of available usdhc devices is something board
      specific.  The patch moves CONFIG_SYS_FSL_USDHC_NUM out of
      mx6qsabre_common.h and adds usdhc2 and usdhc4 support for mx6qsabresd
      board.
      
      To keep the default mmc device for environment same as before (usdhc3),
      it moves CONFIG_SYS_MMC_ENV_DEV out of mx6qsabre_common.h and changes
      it to 1 for mx6qsabresd.
      Signed-off-by: 's avatarShawn Guo <shawn.guo@linaro.org>
      de7d02ae
  33. 26 Dec, 2012 1 commit
  34. 27 Nov, 2012 1 commit
  35. 19 Nov, 2012 1 commit