1. 09 May, 2014 1 commit
  2. 24 Apr, 2014 2 commits
  3. 23 Apr, 2014 14 commits
  4. 20 Apr, 2014 1 commit
  5. 18 Apr, 2014 10 commits
  6. 17 Apr, 2014 5 commits
  7. 12 Mar, 2014 1 commit
  8. 11 Mar, 2014 2 commits
    • Tom Rini's avatar
      boards.cfg: Run the reformatter script · f351eb0f
      Tom Rini authored
      Some recent changes got parts of the file out of order again, correct.
      Signed-off-by: default avatarTom Rini <trini@ti.com>
      f351eb0f
    • Masahiro Yamada's avatar
      boards.cfg: move boards with invalid emails to Orphan · 31f1b654
      Masahiro Yamada authored
      When I cc board maintainers, some of them result in
      bounce mails.
      
      It turned out the following do not work any more:
        Yuli Barcohen <yuli@arabellasw.com>
        Travis Sawyer <travis.sawyer@sandburst.com>
        Yusdi Santoso <yusdi_santoso@adaptec.com>
        David Updegraff <dave@cray.com>
        Sangmoon Kim <dogoil@etinsys.com>
        Anton Vorontsov <avorontsov@ru.mvista.com>
        Blackfin Team <u-boot-devel@blackfin.uclinux.org>
        Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
        Andre Schwarz <andre.schwarz@matrix-vision.de>
      
      For the blackfin boards where Sonic Zhang is also listed
      as a maintainer, dead addresses should be simply dropped.
      
      For all of the others, the status should be changed to "Orphan".
      
      We have adopted the definition of "Orphan" as:
      board is not actively maintained any more but still builds, and any
      address associated with it is that of the last known maintainer(s)
      
      Even though the emails do not work any more, they carry information.
      We want to keep them.
      
      Besides, Orphan boards have been collected at the bottom of boards.cfg.
      (This is done when we run "tools/reformat.py")
      
      Add separators to distinguish them from those which
      were moved to Orphan 6 months ago.
      I believe it will be helpful in future to find which boards are
      old enough to be removed from the code base.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Cc: Detlev Zundel <dzu@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
      31f1b654
  9. 10 Mar, 2014 1 commit
    • Masahiro Yamada's avatar
      m68k: Remove M5271EVB and idmr board support · ba650e9b
      Masahiro Yamada authored
      CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
      as 1000000 and idmr.h defines it as (50000000 / 64).
      
      When compiling these two boards, a warning message is displayed:
      
        time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
        and should not be defined by platforms" [-Wcpp]
      
      There are no board maintainers for them so this commit just
      deletes them.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Cc: Jason Jin <Jason.jin@freescale.com>
      ba650e9b
  10. 09 Mar, 2014 1 commit
  11. 07 Mar, 2014 2 commits
    • Shengzhou Liu's avatar
      powerpc/t2080rdb: Add T2080PCIe-RDB board support · 8d67c368
      Shengzhou Liu authored
      T2080PCIe-RDB is a Freescale Reference Design Board that hosts the T2080 SoC.
      It works in two mode: standalone mode and PCIe endpoint mode.
      
      T2080PCIe-RDB Feature Overview
      ------------------------------
      Processor:
       - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
      DDR Memory:
       - Single memory controller capable of supporting DDR3 and DDR3-LP devices
       - 72bit 4GB DDR3-LP SODIMM in slot
      Ethernet interfaces:
       - Two 10M/100M/1G RGMII ports on-board
       - Two 10Gbps SFP+ ports on-board
       - Two 10Gbps Base-T ports on-board
      Accelerator:
       - DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
      SerDes 16 lanes configuration:
       - SerDes-1 Lane A-B: to two 10G XFI fiber (MAC9 & MAC10)
       - SerDes-1 Lane C-D: to two 10G Base-T (MAC1 & MAC2)
       - SerDes-1 Lane E-H: to PCIe Goldfinger (PCIe4 x4, Gen3)
       - SerDes-2 Lane A-D: to PCIe Slot (PCIe1 x4, Gen2)
       - SerDes-2 Lane E-F: to C293 secure co-processor (PCIe2 x2)
       - SerDes-2 Lane G-H: to SATA1 & SATA2
      IFC/Local Bus:
       - NOR:  128MB 16-bit NOR flash
       - NAND: 512MB 8-bit NAND flash
       - CPLD: for system controlling with programable header on-board
      eSPI:
       - 64MB N25Q512 SPI flash
      USB:
       - Two USB2.0 ports with internal PHY (both Type-A)
      PCIe:
       - One PCIe x4 gold-finger
       - One PCIe x4 connector
       - One PCIe x2 end-point device (C293 Crypto co-processor)
      SATA:
       - Two SATA 2.0 ports on-board
      SDHC:
       - support a TF-card on-board
      I2C:
       - Four I2C controllers.
      UART:
       - Dual 4-pins UART serial ports
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      8d67c368
    • Masahiro Yamada's avatar
      mips: move CONFIG_MIPS{32, 64} definition to config.mk · cfda6bd2
      Masahiro Yamada authored
      All mips32 boards define CONFIG_MIPS32 in config headers
      except malta boards which define it in boards.cfg.
      We can consolidate them by defining it in
      arch/mips/cpu/mips32/config.mk.
      
      CONFIG_MIPS64 definition can be moved to
      arch/mips/cpu/mips64/config.mk as well.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
      Acked-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
      cfda6bd2