1. 05 Sep, 2014 5 commits
  2. 31 Aug, 2014 15 commits
  3. 30 Aug, 2014 11 commits
  4. 29 Aug, 2014 1 commit
    • Chin Liang See's avatar
      socfpga: Fix SOCFPGA build error for Altera dev kit · 3ab019e1
      Chin Liang See authored
      To fix the build error when build for Altera dev kit, not
      virtual target. At same time, set the build for Altera dev
      kit as default instead virtual target. With that, U-Boot
      is booting well and SPL still lack of few drivers.
      Signed-off-by: default avatarChin Liang See <clsee@altera.com>
      Cc: Pavel Machek <pavel@denx.de>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Tom Rini <trini@ti.com>
      Cc: Albert Aribaud <albert.u.boot@aribaud.net>
      3ab019e1
  5. 26 Aug, 2014 1 commit
  6. 25 Aug, 2014 7 commits
    • Heiko Schocher's avatar
      mtd, ubi, ubifs: resync with Linux-3.14 · ff94bc40
      Heiko Schocher authored
      resync ubi subsystem with linux:
      
      commit 455c6fdbd219161bd09b1165f11699d6d73de11c
      Author: Linus Torvalds <torvalds@linux-foundation.org>
      Date:   Sun Mar 30 20:40:15 2014 -0700
      
          Linux 3.14
      
      A nice side effect of this, is we introduce UBI Fastmap support
      to U-Boot.
      Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
      Signed-off-by: default avatarTom Rini <trini@ti.com>
      Cc: Marek Vasut <marex@denx.de>
      Cc: Sergey Lapin <slapin@ossfans.org>
      Cc: Scott Wood <scottwood@freescale.com>
      Cc: Joerg Krause <jkrause@posteo.de>
      ff94bc40
    • Lokesh Vutla's avatar
      ARM: DRA: Enable VTT regulator · 7b922523
      Lokesh Vutla authored
      DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination
      and this is controlled by gpio7_11. Configuring gpio7_11.
      The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards,
      and left unused on previous boards, so it is safe enough to enable gpio
      on all DRA7 boards.
      Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
      7b922523
    • Tom Rini's avatar
      am335x_evm: Convert CONFIG_CONS_INDEX into a menu choice · 1286b7f6
      Tom Rini authored
      - Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead
      - Add choice and help text to board/ti/am335x/Kconfig
      - Correct comment about IDK in board/ti/am335x/mux.c
      - Remove am335x_evm_uart* defconfig files as they're just variations
        on a config option now.
      Signed-off-by: default avatarTom Rini <trini@ti.com>
      1286b7f6
    • Dmitry Lifshitz's avatar
      cm-t54: fix eMMC boot mode check · e1c9895c
      Dmitry Lifshitz authored
      Boot from eMMC boot partition corresponds to BOOT_DEVICE_MMC2
      omap_bootmode, while BOOT_DEVICE_MMC2_2 corresponds to the user
      data partition boot.
      
      Fix mmc_get_env_part() boot mode check to use a correct value.
      Signed-off-by: default avatarDmitry Lifshitz <lifshitz@compulab.co.il>
      e1c9895c
    • Dmitry Lifshitz's avatar
      cm-t54: fix EEPROM read return value check · 91c9885e
      Dmitry Lifshitz authored
      Fix cl_eeprom_read_mac_addr() return value check.
      Fix long line codding style issue in board_init().
      Signed-off-by: default avatarDmitry Lifshitz <lifshitz@compulab.co.il>
      91c9885e
    • Vitaly Andrianov's avatar
      keystone2: use EFUSE_BOOTROM information to configure PLLs · 61f66fd5
      Vitaly Andrianov authored
      This patch reads EFUSE_BOOTROM register to see the maximum supported
      clock for CORE and TETRIS PLLs and configure them accordingly.
      Acked-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
      Signed-off-by: default avatarVitaly Andrianov <vitalya@ti.com>
      Signed-off-by: default avatarIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
      61f66fd5
    • pekon gupta's avatar
      board/ti/dra7xx: add support for parallel NOR · 9352697a
      pekon gupta authored
      This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
      The Flash device is connected to GPMC controller on chip-select[0] and accessed
      as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
      is CFI compatible.
      
      As multiple devices are share GPMC pins on this board, so following board
      settings are required to detect NOR device:
           SW5.1 (NAND_BOOTn) = OFF (logic-1)
           SW5.2 (NOR_BOOTn)  = ON  (logic-0) /* Active-low */
           SW5.3 (eMMC_BOOTn) = OFF (logic-1)
           SW5.4 (QSPI_BOOTn) = OFF (logic-1)
      
      And also set appropriate SYSBOOT configurations:
           SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
           SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
           SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
           SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
           SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
           SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
           SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
           SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */
      
      Also, following changes are required to enable NOR Flash support in
      dra7xx_evm board profile:
      9352697a