1. 10 Nov, 2015 1 commit
    • Tom Rini's avatar
      Various Makefiles: Add SPDX-License-Identifier tags · da58dec8
      Tom Rini authored
      After consulting with some of the SPDX team, the conclusion is that
      Makefiles are worth adding SPDX-License-Identifier tags too, and most of
      ours have one.  This adds tags to ones that lack them and converts a few
      that had full (or in one case, very partial) license blobs into the
      equivalent tag.
      
      Cc: Kate Stewart <kstewart@linuxfoundation.org>
      Signed-off-by: default avatarTom Rini <trini@konsulko.com>
      da58dec8
  2. 05 Nov, 2015 1 commit
  3. 04 Mar, 2015 1 commit
    • Shaveta Leekha's avatar
      powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs · b8bf0adc
      Shaveta Leekha authored
      The code provides framework for heterogeneous multicore chips based on StarCore
      and Power Architecture which are chasis-2 compliant, like B4860 and B4420
      
      It will make u-boot recognize all non-ppc cores and peripherals like
      SC3900/DSP CPUs, MAPLE, CPRI and print their configuration in u-boot logs.
      Example boot logs of B4860QDS:
      
      U-Boot 2015.01-00232-geef6e36-dirty (Jan 19 2015 - 11:58:45)
      
      CPU0:  B4860E, Version: 2.2, (0x86880022)
      Core:  e6500, Version: 2.0, (0x80400120)
      Clock Configuration:
             CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
             DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200 MHz,
             DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
             CCB:666.667 MHz,
             DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667 MHz
             CPRI:600  MHz
             MAPLE:600  MHz, MAPLE-ULB:800  MHz, MAPLE-eTVPE:1000 MHz
             FMAN1: 666.667 MHz
             QMAN:  333.333 MHz
      
      Top level changes include:
      (1) Top level CONFIG to identify HETEROGENUOUS clusters
      (2) CONFIGS for SC3900/DSP components
      (3) Global structures like "cpu_type" and "MPC85xx_SYS_INFO"
          updated for dsp cores and other components
      (3) APIs to get DSP num cores and their Mask like:
              cpu_dsp_mask, cpu_num_dspcores etc same as that of PowerPC
      (5) Code to fetch and print SC cores and other heterogenous
          device's frequencies
      (6) README added for the same
      Signed-off-by: default avatarShaveta Leekha <shaveta@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      b8bf0adc
  4. 24 Jan, 2015 1 commit
  5. 21 Jan, 2015 1 commit
  6. 11 Dec, 2014 1 commit
  7. 05 Dec, 2014 1 commit
    • Shengzhou Liu's avatar
      powerpc/mpc85xx: Add T1024/T1023 SoC support · f6050790
      Shengzhou Liu authored
      Add support for Freescale T1024/T1023 SoC.
      
      The T1024 SoC includes the following function and features:
      - Two 64-bit Power architecture e5500 cores, up to 1.4GHz
      - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC)
      - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
      - Data Path Acceleration Architecture (DPAA) incorporating acceleration
      - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI)
      - High-speed peripheral interfaces
        - Three PCI Express 2.0 controllers
      - Additional peripheral interfaces
        - One SATA 2.0 controller
        - Two USB 2.0 controllers with integrated PHY
        - Enhanced secure digital host controller (SD/eSDHC/eMMC)
        - Enhanced serial peripheral interface (eSPI)
        - Four I2C controllers
        - Four 2-pin UARTs or two 4-pin UARTs
        - Integrated Flash Controller supporting NAND and NOR flash
      - Two 8-channel DMA engines
      - Multicore programmable interrupt controller (PIC)
      - LCD interface (DIU) with 12 bit dual data rate
      - QUICC Engine block supporting TDM, HDLC, and UART
      - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
      - Support for hardware virtualization and partitioning enforcement
      - QorIQ Platform's Trust Architecture 2.0
      
      Differences between T1024 and T1023:
        Feature         T1024  T1023
        QUICC Engine:   yes    no
        DIU:            yes    no
        Deep Sleep:     yes    no
        I2C controller: 4      3
        DDR:            64-bit 32-bit
        IFC:            32-bit 28-bit
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      f6050790
  8. 16 Oct, 2014 1 commit
  9. 24 Sep, 2014 1 commit
    • ramneek mehresh's avatar
      powerpc/8xxx: Fix in USB device-tree fixup · e628c8f7
      ramneek mehresh authored
      Fix following issues in USB device-tree fixup:
              - returns when either dr_mode or phy_type not defined.
                This was terminating fix-up when only either property
                was defined in hwconfig string
              - updates dr_mode_type or dr_phy_type with junk value when
                their index is -1. Now these are updated only when their
                respective index is pointing to relevant types
                in modes[] and phys[] array
              - dr_mode_type and dr_phy_type were not NULL for
                each controller
      Signed-off-by: default avatarRamneek Mehresh <ramneek.mehresh@freescale.com>
      Reviewed-by: default avatarYork Sun <yorksun@freescale.com>
      e628c8f7
  10. 22 Jul, 2014 1 commit
  11. 16 May, 2014 1 commit
  12. 13 May, 2014 2 commits
    • Alexander Graf's avatar
      PPC 85xx QEMU: Always assume 1 core · b539534d
      Alexander Graf authored
      We only need u-boot to bother about a single core in the QEMU machine.
      Everything that would require additional knowledge of more cores gets
      handled by QEMU and passed straight into the payload we execute.
      
      Because of this setup, it would be counterproductive to enable SMP support
      in u-boot. We would have to rip CPUs out of already existing spin tables
      and respin them from u-boot. It would be a pretty big mess.
      
      So only assume we have a single core. This fixes errors about CONFIG_MP
      being disabled.
      Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
      b539534d
    • Shengzhou Liu's avatar
      powerpc/85xx: add T4080 SoC support · 5122dfae
      Shengzhou Liu authored
      The T4080 SoC is a low-power version of the T4160.
      T4080 combines 4 dual-threaded Power Architecture e6500
      cores with single cluster and two memory complexes.
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      5122dfae
  13. 23 Apr, 2014 2 commits
  14. 16 Dec, 2013 1 commit
  15. 25 Nov, 2013 3 commits
    • Shengzhou Liu's avatar
      powerpc/mpc85xx: Add T2080/T2081 SoC support · 629d6b32
      Shengzhou Liu authored
      Add support for Freescale T2080/T2081 SoC.
      
      T2080 includes the following functions and features:
      - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
      - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
      - Hierarchical interconnect fabric
      - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
      - Data Path Acceleration Architecture (DPAA) incorporating acceleration
      - 16 SerDes lanes up to 10.3125 GHz
      - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs)
      - High-speed peripheral interfaces
        - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
        - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz
      - Additional peripheral interfaces
        - Two serial ATA (SATA 2.0) controllers
        - Two high-speed USB 2.0 controllers with integrated PHY
        - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC)
        - Enhanced serial peripheral interface (eSPI)
        - Four I2C controllers
        - Four 2-pin UARTs or two 4-pin UARTs
        - Integrated Flash Controller supporting NAND and NOR flash
      - Three eight-channel DMA engines
      - Support for hardware virtualization and partitioning enforcement
      - QorIQ Platform's Trust Architecture 2.0
      
      Differences between T2080 and T2081:
        Feature               T2080 T2081
        1G Ethernet numbers:  8     6
        10G Ethernet numbers: 4     2
        SerDes lanes:         16    8
        Serial RapidIO,RMan:  2     no
        SATA Controller:      2     no
        Aurora:               yes   no
        SoC Package:          896-pins 780-pins
      Signed-off-by: default avatarShengzhou Liu <Shengzhou.Liu@freescale.com>
      Acked-by: default avatarYork Sun <yorksun@freescale.com>
      629d6b32
    • York Sun's avatar
      Driver/IFC: Move Freescale IFC driver to a common driver · 0b66513b
      York Sun authored
      Freescale IFC controller has been used for mpc8xxx. It will be used
      for ARM-based SoC as well. This patch moves the driver to driver/misc
      and fix the header file includes.
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      0b66513b
    • York Sun's avatar
      Driver/DDR: Moving Freescale DDR driver to a common driver · 5614e71b
      York Sun authored
      Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
      The similar DDR controllers will be used for ARM-based SoCs.
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      5614e71b
  16. 21 Nov, 2013 1 commit
  17. 17 Nov, 2013 1 commit
  18. 31 Oct, 2013 1 commit
    • Masahiro Yamada's avatar
      powerpc: convert makefiles to Kbuild style · 06c14117
      Masahiro Yamada authored
      Note:
      arch/powerpc/cpu/mpc8260/Makefile is originally like follows:
      
          ---<snip>---
          START   = start.o kgdb.o
          COBJS   = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \
          ---<snip>---
          COBJS-$(CONFIG_ETHER_ON_SCC) = ether_scc.o
          ---<snip>---
          $(LIB): $(OBJS)
                  $(call cmd_link_o_target, $(OBJS) $(obj)kgdb.o)
      
      The link rule `$(call cmd_link_o_target, $(OBJS) $(obj)kgdb.o)'
      is weird.
      kbdg.o is not included in $(OBJS) but linked into $(LIB)
      and $(LIB) is not dependent on kgdb.o.
      (Broken dependency tracking)
      
      So,
          START   = start.o kgdb.o
      shoud have been
          START   = start.o
          SOBJS   = kgdb.o
      
      That is why this commit adds kgdb.o to obj-y, not to extra-y.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Cc: Wolfgang Denk <wd@denx.de>
      Cc: Stefan Roese <sr@denx.de>
      06c14117
  19. 24 Oct, 2013 3 commits
  20. 16 Oct, 2013 1 commit
  21. 20 Aug, 2013 3 commits
  22. 14 Aug, 2013 1 commit
  23. 09 Aug, 2013 6 commits
  24. 24 Jul, 2013 1 commit
  25. 20 Jun, 2013 3 commits