1. 23 Aug, 2015 12 commits
    • Marek Vasut's avatar
      arm: socfpga: Add qts-filter.sh script · e996b936
      Marek Vasut authored
      Add script which loads the QTS-generated sources and headers and converts
      them into sensible format which can be used with much more easy in mainline
      U-Boot. The script also filters out macros which makes no sense anymore, so
      they don't pollute namespace and waste space.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      e996b936
    • Marek Vasut's avatar
      arm: socfpga: Remove AV-specific parts from CV-SoCDK · 37b3a30a
      Marek Vasut authored
      Just remove the ArriaV specific parts from the CycloneV SoCDK board
      and they are no longer needed now.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      37b3a30a
    • Marek Vasut's avatar
      arm: socfpga: Remove CV-specific parts from AV-SoCDK · c68eea04
      Marek Vasut authored
      Just remove the CycloneV specific parts from the ArriaV SoCDK board
      and they are no longer needed now.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      c68eea04
    • Marek Vasut's avatar
      arm: socfpga: Split Altera socfpga into AV and CV SoCDK · f0892401
      Marek Vasut authored
      The board/altera/socfpga directory is not a generic SoCFPGA machine
      anymore, but instead it represents the Altera SoCDK board. To make
      matters more complicated, it represents both CycloneV and ArriaV
      variant.
      
      On the other hand, nowadays, the content of this board directory is
      mostly comprised of QTS-generated header files, while all the generic
      code is in arch/arm/mach-socfpga already.
      
      Thus, this patch splits the board/altera/socfpga into a separate
      board directory for ArriaV SoCDK and CycloneV SoCDK, so that each
      can be populated with the correct QTS-generated header files for
      that particular board.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      f0892401
    • Marek Vasut's avatar
      arm: socfpga: Unbind CPU type from board type · cd9b7317
      Marek Vasut authored
      The CONFIG_TARGET_SOCFPGA_CYCLONE5 and CONFIG_TARGET_SOCFPGA_ARRIA5
      selected both a board and a CPU. This is not correct as these macros
      are supposed to select only board.
      
      All would be good, if QTS-generated header files didn't check for
      these macros exactly to determine if the platform is Cyclone V or
      Arria V. Thus, for the sake of compatibility with not well fleshed
      out header file generator, this patch makes these two macros into
      a stub config option and introduces new CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK
      and CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK targets, which select the
      previous stub config option.
      
      The result is that compatibility with QTS is preserved and the new
      CONFIG_TARGET_* select actual target boards.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      cd9b7317
    • Marek Vasut's avatar
      arm: socfpga: Move wrappers into platform directory · ca62d2e1
      Marek Vasut authored
      Move the wrappers for QTS-generated files into platform directory
      out of the board directory. The trick here is to add -I to CFLAGS
      such that it points to the board directory in source tree and thus
      the qts/ directory there is still reachable.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      ca62d2e1
    • Marek Vasut's avatar
      arm: socfpga: Do not enable gmac1 in Cyclone V dtsi · c2624240
      Marek Vasut authored
      The GMAC which is enabled is purely board property, so do not enable
      arbitrary GMAC in DT include files. Same goes for PHY mode, which is
      again a board property. The CycloneV SoCDK does this correctly, but
      SoCrates doesn't. This bug never manifested itself though, since all
      the boards ever used the GMAC1 . This bug manifests itself only on
      boards that utilise GMAC0.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      c2624240
    • Marek Vasut's avatar
      arm: socfpga: Make the DT mmc node consistent · afe13993
      Marek Vasut authored
      The socfpga_cyclone5.dtsi has an mmc0 node, socrates has mmc node.
      This makes aliases not very usable, so make everything into mmc0.
      Moreover, zap the useless mmc alias while at this.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      afe13993
    • Marek Vasut's avatar
      arm: socfpga: Fix delay in clock manager · 7e4d2fa2
      Marek Vasut authored
      This code claims it needs to wait 7us, yet it uses get_timer() function
      which operates with millisecond granularity. Use timer_get_us() instead,
      which operates with microsecond granularity.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      7e4d2fa2
    • Marek Vasut's avatar
      arm: socfpga: Fix delay in freeze controller · a8535c30
      Marek Vasut authored
      Based on observation, this udelay(20) was apparently too high and caused
      subsequent failure to calibrate DDR when U-Boot was compiled with certain
      toolchains. Lowering this delay fixed the problem.
      
      Instead of permanently lowering the delay, calculate the correct delay
      based on the original comment, that is, obtain EOSC1 frequency and use
      it to calculate the precise delay.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      a8535c30
    • Marek Vasut's avatar
      ddr: altera: Repair uninited variable · 35e47b71
      Marek Vasut authored
      Fix the following problem:
      drivers/ddr/altera/sequencer.c: In function 'sdram_calibration_full':
      drivers/ddr/altera/sequencer.c:1943:25: warning: 'found_failing_read' may be used uninitialized in this function [-Wmaybe-uninitialized]
        if (found_passing_read && found_failing_read)
                               ^
      drivers/ddr/altera/sequencer.c:1803:26: note: 'found_failing_read' was declared here
        u32 found_passing_read, found_failing_read, initial_failing_dtap;
                                ^
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      35e47b71
    • Marek Vasut's avatar
      ddr: altera: Replace float multiplication with integer one · 6d7a3330
      Marek Vasut authored
      This gem is really really rare, there was an actual float used in
      the Altera DDR init code, which pulled in floating point ops from
      the libgcc, just wow.
      
      Since we don't support floating point operations the same way Linux
      does not support them, replace this with an integer multiplication
      and division combo. This removes some 2kiB of size from the SPL as
      the floating point ops are no longer pulled in from libgcc.
      
      This was detected by enabling CONFIG_USE_PRIVATE_LIBGCC=y , which
      does not contain the floating point bits.
      Signed-off-by: default avatarMarek Vasut <marex@denx.de>
      6d7a3330
  2. 20 Aug, 2015 1 commit
  3. 19 Aug, 2015 23 commits
  4. 18 Aug, 2015 4 commits