1. 12 Aug, 2014 2 commits
  2. 30 Jul, 2014 2 commits
    • Masahiro Yamada's avatar
      Add board MAINTAINERS files · 93d4334f
      Masahiro Yamada authored
      We have switched to Kconfig and the boards.cfg file is going to
      be removed. We have to retrieve the board status and maintainers
      information from it.
      
      The MAINTAINERS format as in Linux Kernel would be nice
      because we can crib the scripts/get_maintainer.pl script.
      
      After some discussion, we chose to put a MAINTAINERS file under each
      board directory, not the top-level one because we want to collect
      relevant information for a board into a single place.
      
      TODO:
      Modify get_maintainer.pl to scan multiple MAINTAINERS files.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Suggested-by: default avatarTom Rini <trini@ti.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      93d4334f
    • Masahiro Yamada's avatar
      kconfig: add board Kconfig and defconfig files · dd84058d
      Masahiro Yamada authored
      This commit adds:
       - arch/${ARCH}/Kconfig
          provide a menu to select target boards
       - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
          set CONFIG macros to the appropriate values for each board
       - configs/${TARGET_BOARD}_defconfig
          default setting of each board
      
      (This commit was automatically generated by a conversion script
      based on boards.cfg)
      
      In Linux Kernel, defconfig files are located under
      arch/${ARCH}/configs/ directory.
      It works in Linux Kernel since ARCH is always given from the
      command line for cross compile.
      
      But in U-Boot, ARCH is not given from the command line.
      Which means we cannot know ARCH until the board configuration is done.
      That is why all the "*_defconfig" files should be gathered into a
      single directory ./configs/.
      Signed-off-by: default avatarMasahiro Yamada <yamada.m@jp.panasonic.com>
      Acked-by: default avatarSimon Glass <sjg@chromium.org>
      dd84058d
  3. 22 Jul, 2014 1 commit
    • York Sun's avatar
      powerpc/mpc85xx: Check return value of find_tlb_idx · 9d045682
      York Sun authored
      find_tlb_idx() is called in board_early_init_r() on multiple boards.
      The return value is not checked before being used to disable a TLB.
      In normal case the return value wouldn't be -1. In case of a mis-
      configuration during porting to a new board, checking the return value
      may be helpful to reveal some user errors.
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      9d045682
  4. 16 May, 2014 1 commit
  5. 23 Apr, 2014 4 commits
  6. 07 Mar, 2014 1 commit
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Update DDR initialization related settings · 96ac18c9
      Priyanka Jain authored
      Update following DDR related settings for T1040RDB, T1042RDB_PI
      -Correct number of chip selects to two as t1040 supports
       two Chip selects.
      -Update board_specific_parameters udimm structure with settings
       derived via calibration.
      -Update ddr_raw_timing sructure corresponding to DIMM.
      -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm,
       but on T104xRDB, on setting this , DDR instability is observed.
       Board-level debugging is in progress.
      
      Verified the updated settings to be working fine with dual-ranked
      Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s.
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      Signed-off-by: default avatarYork Sun <yorksun@freescale.com>
      96ac18c9
  7. 03 Feb, 2014 2 commits
  8. 21 Jan, 2014 1 commit
  9. 25 Nov, 2013 1 commit
  10. 13 Nov, 2013 2 commits
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Add T1042RDB_PI board support · 0d7ba2ea
      Priyanka Jain authored
      T1042RDB_PI is Freescale Reference Design Board supporting the T1042
      QorIQ Power Architecture processor. T1042 is a reduced personality
      of T1040 SoC without Integrated 8-port Gigabit. The board is designed
      with low power features targeted for Printing Image Market.
      
      T1042RDB_PI is  similar to T1040RDB board with few differences like
      it has video interface, supports T1042 personality
      
       T1042RDB_PI board Overview
       -----------------------
       - Four e5500 cores, each with a private 256 KB L2 cache
       - 256 KB shared L3 CoreNet platform cache (CPC)
       - Interconnect CoreNet platform
       - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
         support
       - Data Path Acceleration Architecture (DPAA) incorporating acceleration
       for the following functions:
          -  Packet parsing, classification, and distribution
          -  Queue management for scheduling, packet sequencing, and congestion
          	management
          -  Cryptography Acceleration
          - RegEx Pattern Matching Acceleration
          - IEEE Std 1588 support
          - Hardware buffer management for buffer allocation and deallocation
       - Ethernet interfaces
          - Two on-board RGMII 10/100/1G ethernet ports.
       - SERDES Connections, 8 lanes supporting:
            — PCI
            — SATA 2.0
       - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
         Interleaving
       -IFC/Local Bus
           - NAND flash: 1GB 8-bit NAND flash
           - NOR: 128MB 16-bit NOR Flash
       - Ethernet
           - Two on-board RGMII 10/100/1G ethernet ports.
           - PHY #0 remains powered up during deep-sleep
       - CPLD
       - Clocks
           - System and DDR clock (SYSCLK, “DDRCLK”)
           - SERDES clocks
       - Video
           - DIU supports video at up to 1280x1024x32bpp
           - HDMI connector
       - Power Supplies
       - USB
           - Supports two USB 2.0 ports with integrated PHYs
           - Two type A ports with 5V@1.5A per port.
       - SDHC
           - SDHC/SDXC connector
       - SPI
           - On-board 64MB SPI flash
       - I2C
           - Device connected: EEPROM, thermal monitor, VID controller, RTC
       - Other IO
          - Two Serial ports
          - ProfiBus port
          - Four I2C ports
      Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      0d7ba2ea
    • Priyanka Jain's avatar
      powerpc/t104xrdb: Add T1040RDB board support · 062ef1a6
      Priyanka Jain authored
      T1040RDB is Freescale Reference Design Board supporting
      the T1040 QorIQ Power Architecture processor.
      
       T1040RDB board Overview
       -----------------------
       - Four e5500 cores, each with a private 256 KB L2 cache
       - 256 KB shared L3 CoreNet platform cache (CPC)
       - Interconnect CoreNet platform
       - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
         support
       - Data Path Acceleration Architecture (DPAA) incorporating acceleration
       for the following functions:
          -  Packet parsing, classification, and distribution
          -  Queue management for scheduling, packet sequencing, and congestion
             management
          -  Cryptography Acceleration
          - RegEx Pattern Matching Acceleration
          - IEEE Std 1588 support
          - Hardware buffer management for buffer allocation and deallocation
       - Ethernet interfaces
          - Integrated 8-port Gigabit Ethernet switch
          - Four 1 Gbps Ethernet controllers
       - SERDES Connections, 8 lanes supporting:
          - PCI
          - SGMII
          - QSGMII
          - SATA 2.0
       - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
         Interleaving
       -IFC/Local Bus
          - NAND flash: 1GB 8-bit NAND flash
          - NOR: 128MB 16-bit NOR Flash
       - Ethernet
          - Two on-board RGMII 10/100/1G ethernet ports.
          - PHY #0 remains powered up during deep-sleep
       - CPLD
       - Clocks
          - System and DDR clock (SYSCLK, “DDRCLK”)
          - SERDES clocks
       - Power Supplies
       - USB
          - Supports two USB 2.0 ports with integrated PHYs
          - Two type A ports with 5V@1.5A per port.
       - SDHC
          - SDHC/SDXC connector
       - SPI
          - On-board 64MB SPI flash
       - I2C
          - Devices connected: EEPROM, thermal monitor, VID controller
       - Other IO
          - Two Serial ports
          - ProfiBus port
      Signed-off-by: default avatarPoonam Aggrwal <poonam.aggrwal@freescale.com>
      Signed-off-by: default avatarPrabhakar Kushwaha <prabhakar@freescale.com>
      Signed-off-by: default avatarPriyanka Jain <Priyanka.Jain@freescale.com>
      [York Sun: fixed Makefile]
      Acked-by: default avatarYork Sun <yorksun@freescale.com>
      062ef1a6