1. 02 Nov, 2017 1 commit
    • zhang sanshan's avatar
      MA-9409-3 Add base board support for android and android things. · f791112b
      zhang sanshan authored
      * add board support for android and android things.
        mx6ul_nxpu_iopb, pico-6ul, pico-imx7d, aquila-6ul
        reorganize the Kconfig, and fix the redefine issue.
      * add android configure into configure-while
      * add a common file mx_android_common.h
        it will be included by android and android things.
        defconfig only include ANDROID_THINGS_SUPPORT or ANDROID_SUPPORT
      * move partition_table_valid into f_fastboot.c.
        it's a common code.
      * add invalidate_dcache_range in fixed order.
        It will have salt invalid issue if we do not add it in order
      * add display for pico-7d.
      
      Change-Id: I6f8a4876c2f8bbd098034d1e3f53033109300bca
      Signed-off-by: default avatarzhang sanshan <sanshan.zhang@nxp.com>
      f791112b
  2. 18 May, 2017 1 commit
  3. 09 May, 2017 1 commit
    • Ye Li's avatar
      MLK-14845 mx6/mx7: Not call usb setup functions used by non-DM driver · 32d4060f
      Ye Li authored
      Use CONFIG_DM_USB to comment out USB setup functions used by non-DM driver. So
      they won't be executed when using DM driver.
      
      These USB setup functions may setup power control pins to USB_PWR function not GPIO,
      which is different as the GPIO function used by USB vbus-supply. And cause the power control
      not work.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      32d4060f
  4. 04 May, 2017 1 commit
  5. 05 Apr, 2017 9 commits
    • Ye Li's avatar
      MLK-12527-3 android: Add board support to enable android fastboot · dcba1e63
      Ye Li authored
      Add board level support for android fastboot feature. Each board has
      a android specified header file for defining android related configuraitons.
      And add build targets for their android uboot images building.
      
      For mx6qsabreauto, mx6sabresd and mx7dsabresd, we enable the android
      fastboot exclusive with DFU.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 43fe988af28c5e51fb23aa846e04bc9698256926)
      dcba1e63
    • Ye Li's avatar
      MLK-14326-14 mx6ulevk: Enable OF_CONTROL and DM drivers · b224cafc
      Ye Li authored
      Update mx6ulevk board files and build configurations to enable
      OF_CONTROL and DM drivers.
      
      1. QSPI settings and codes update for using DM QSPI driver.
         For DM and non-DM driver, the AMBA address is not same.
      2. Update configurations for DM i2c driver, using CONFIG_SYS_I2C for non-DM driver
      3. GPIO update for adding gpio_request
      4. Add FEC DM driver support for two FEC controllers.
      5. Enable USB DM driver.
      6. Enable 74X164 DM driver for 74LV controlling.
      7. Enable PMIC DM driver for 9x9 EVK
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      b224cafc
    • Ye Li's avatar
      MLK-12555-2 mx6ulevk: Enable the Watchdog WDOG_B signal output · d0560c22
      Ye Li authored
      When using watchdog timeout in kernel, the reset does not output the
      WDOG_B signal, so the power supply won't be reset. To solve the problem,
      we enable it in u-boot.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 8a713e8cd1500ecc6daa02a14a63763a548095b4)
      d0560c22
    • Ye.Li's avatar
      MLK-11230 imx6: USB: Modify OTG ID pin pad setting to pull up · f8f50ba4
      Ye.Li authored
      Set the ID pin pad to pull up not the pull down at default, otherwise
      we can't enter the device mode, but always detect as host.
      
      After this change we have to use portA cable to play as host,
      and use portB cable for device.
      Signed-off-by: default avatarYe.Li <B37916@freescale.com>
      (cherry picked from commit b315d6b36a913d75d25284320e69050ebdf7a7eb)
      f8f50ba4
    • Ye Li's avatar
      MLK-12495 mx6: Add LDO bypass support · 8f8699a8
      Ye Li authored
      Port LDO bypass support from v2015 to support the features:
      
      1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
         enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
         on the flatten device tree file.
      
      2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
         on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
         reboot whole board, so split these code to independent function so that board file
         can call it freely.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 5b87d04dba66fa45375d59648838ef89f559f75d)
      8f8699a8
    • Ye Li's avatar
      MLK-14259-3 mx6ulevk: Add support for NAND · 7e43357e
      Ye Li authored
      Add NAND pinmux settings, clock setting and related configurations.
      Default not enabled, need hardware rework.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      7e43357e
    • Ye Li's avatar
      MLK-12483-5 mx6ul: Enable module fuse check EVK board · 687b586b
      Ye Li authored
      Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
      module fuse check. And modify board level codes for SD, FEC and EIM.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit 9232e9f7637afa3b71b43ab2d1361582ec5a080a)
      687b586b
    • Ye Li's avatar
      MLK-12437-5 mx6ulevk: Update display to support panel selection · 37f58a1b
      Ye Li authored
      Change to panel environment for display at default. Align this feature to
      v2015.04 uboot.
      Signed-off-by: default avatarYe Li <ye.li@nxp.com>
      (cherry picked from commit ea93a34a3348f80462ea5b61a4ca2e9a1d267f4c)
      37f58a1b
    • Peng Fan's avatar
      MLK-12434-7: mx6ulevk: dynamic setting mmcdev and mmcroot · 46fff921
      Peng Fan authored
      Dynamic setting mmcdev and mmcroot for mx6ul evk board.
      Signed-off-by: default avatarPeng Fan <peng.fan@nxp.com>
      (cherry picked from commit 95cf514bb3c17014622bca26cbcbfda31cec861a)
      46fff921
  6. 16 Dec, 2016 1 commit
  7. 06 Sep, 2016 6 commits
    • Fabio Estevam's avatar
      mx6ul_14x14_ev: Enable the CCGR clocks earlier · ab25f0f6
      Fabio Estevam authored
      To be in the safe side we need to enable the CCGR clocks prior
      to calling arch_cpu_init().
      
      Inspired by Tim Harvey's commit d783c274 ("imx: ventana: fix boot to SD").
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarEric Nelson <eric@nelint.com>
      Tested-by: default avatarEric Nelson <eric@nelint.com>
      ab25f0f6
    • Fabio Estevam's avatar
      mx6ul_14x14_evk: Adjust SPL DDR3 settings · b343417e
      Fabio Estevam authored
      Adjust DDR3 initialization done in SPL by comparing them against
      the NXP DCD table.
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarEric Nelson <eric@nelint.com>
      b343417e
    • Fabio Estevam's avatar
      mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang · 7dbda25e
      Fabio Estevam authored
      When running a NXP 4.1 kernel with U-Boot mainline on a mx6ul-evk,
      we observe a hang when going into the lowest operational point of cpufreq.
      
      This hang issue does not happen on the NXP U-Boot version.
      
      After comparing the SPL DDR initialization against the DCD table
      from NXP U-Boot, the key difference that causes the hang is the
      MDREF register setting:
      
      DATA 4 0x021B0020 0x00000800
      
      ,which means:
      
      REF_SEL = 0 --> Periodic refresh cycle: 64kHz
      REFR = 1 ---> Refresh Rate - 2 refreshes
      
      So adjust the MDREF initialization for mx6ul_evk accordingly
      to fix the kernel hang issue at low bus frequency.
      Reported-by: default avatarEric Nelson <eric@nelint.com>
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarEric Nelson <eric@nelint.com>
      7dbda25e
    • Fabio Estevam's avatar
      mx6: ddr: Allow changing REFSEL and REFR fields · edf00937
      Fabio Estevam authored
      Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
      REFR fields of the MDREF register as 1 and 7, respectively for
      DDR3 and 0 and 3 for LPDDR2.
      
      Looking at the MDREF initialization done via DCD we see that
      boards do need to initialize these fields differently:
      
      $ git grep 0x021b0020 board/
      board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
      board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
      board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
      board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
      board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
      board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
      board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
      board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
      board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800
      
      So introduce a mechanism for users to be able to configure
      REFSEL and REFR fields as needed.
      
      Keep all the mx6 SPL users in their current REF_SEL and REFR values,
      so no functional changes for the existing users.
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      Reviewed-by: default avatarEric Nelson <eric@nelint.com>
      edf00937
    • Fabio Estevam's avatar
      mx7dsabresd: Directly write to register LDOGCTL · 946db0cb
      Fabio Estevam authored
      Register LDOGCTL contains only bit 0 as a valid bit, so there is no need
      to do a read-modify-write operation.
      
      Simplify the code by writing directly to this register.
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      946db0cb
    • Eric Nelson's avatar
      mx6ul_14x14_evk: don't use array for SD2 card detect pad · eb3813ad
      Eric Nelson authored
      Only a single pad is changed to change sdhc2_dat3 from an
      SDIO pin to and from GPIO4:5, so remove the array and use
      the imx_iomux_v3_setup_pad() routine.
      Signed-off-by: default avatarEric Nelson <eric@nelint.com>
      Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
      eb3813ad
  8. 28 Jul, 2016 1 commit
  9. 18 Jun, 2016 3 commits
  10. 01 Apr, 2016 1 commit
  11. 06 Feb, 2016 1 commit
  12. 12 Nov, 2015 2 commits
  13. 20 Sep, 2015 3 commits
  14. 13 Sep, 2015 1 commit
    • Peng Fan's avatar
      imx: mx6ul: support mx6ul 9x9 evk board · d9cbb264
      Peng Fan authored
      This patch is to support mx6ul_9x9_evk board based on mx6ul_14x14_evk,
      the difference between mx6ul 9x9 evk and mx6ul 14x14 evk are:
      1. mx6ul 9x9 evk use pfuze3000, while mx6ul 14x14 evk use DCDC.
      2. mx6ul 9x9 evk supports 256MB LPDDR2, while mx6ul 14x14 evk
         supports 512MB DDR3
      3. mx6ul_9x9_evk use 9x9 package, while mx6ul_14x14_evk use 14x14 package.
      
      This patch add the following:
      1. Discard PHYS_SDRAM_SIZE from header file, use imx_ddr_size()
      2. Introduce a macro is_mx6ul_9x9_evk using
         CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) to avoid "#ifdef xxx" in non-SPL
         part. To SPL part, CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK) can not work,
         so still use "#ifdef CONFIG_TARGET_MX6UL_9X9_EVK" to differentiate with
         mx6ul_14x14_evk. And we have no way to dymaically checking this chip
         is 9x9 or 14x14.
      3. mx6ul_9x9_evk use pfuze3000, so enabled POWER related configurations.
         POWER related configurations also effect for mx6ul_14x14_evk. But
         power_init_board implementation using 'if (is_mx6ul_9x9_evk())' to
         do initialization for mx6ul_9x9_evk, and do nothing for mx6ul_14x14_evk.
      4. mx6ul_9x9_evk use lpddr2 with size 256MB, so add related SPL DRAM
         configurations.
      5. Enable CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG and setting dtb file
         according to board_rev and board_name.
      6. Add TARGET_MX6UL_9X9_EVK Kconfig entry
      
      Boot Log:
      U-Boot SPL 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53)
      reading u-boot.img
      reading u-boot.img
      
      U-Boot 2015.10-rc2-00356-g536ce34 (Sep 06 2015 - 12:22:53 +0800)
      
      CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
      CPU:   Commercial temperature grade (0C to 95C) at 41C
      Reset cause: POR
      Board: MX6UL 9x9 EVK
      I2C:   ready
      DRAM:  256 MiB
      PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11
      MMC:   FSL_SDHC: 0, FSL_SDHC: 1
      In:    serial
      Out:   serial
      Err:   serial
      Net:   FEC1
      Hit any key to stop autoboot:  0
      Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
      Cc: Stefano Babic <sbabic@denx.de>
      d9cbb264
  15. 02 Sep, 2015 2 commits
    • Peng Fan's avatar
      imx: mx6: ddr init MMDC according to ddr_type · f2ff8343
      Peng Fan authored
      To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
      to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
      The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
      when ddr_type is for DDR3. Later we can use ddr_type to initialize
      MMDC for LPDDR2.
      
      Initialize ddr_type for different boards which enable SPL.
      Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Tim Harvey <tharvey@gateworks.com>
      Cc: Stefan Roese <sr@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      Reviewed-by: default avatarStefan Roese <sr@denx.de>
      f2ff8343
    • Peng Fan's avatar
      imx: mx6ul_14x14_evk add ENET support · 0d4cdb56
      Peng Fan authored
      Add enet support for mx6ul_14x14_evk board:
      1. add pinmux settings
      2. implement board_eth_init
      3. implement board_phy_config
      Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
      Cc: Stefano Babic <sbabic@denx.de>
      Cc: Fabio Estevam <fabio.estevam@freescale.com>
      0d4cdb56
  16. 02 Aug, 2015 1 commit
    • Peng Fan's avatar
      imx: mx6ul_14x14_evk add basic board support · f0ff57b0
      Peng Fan authored
      1. Add USDHC, I2C, UART, 74LV, USB, QSPI support.
      2. Support SPL
      3. CONFIG_MX6UL_14X14_EVK_EMMC_REWORK is introduced, this board default
         supports sd for usdhc2, but can do hardware rework to make usdhc2 support
         emmc.
      
      Boot Log:
      U-Boot SPL 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59)
      reading u-boot.img
      reading u-boot.img
      
      U-Boot 2015.07-rc3-00124-g35d727b (Jul 20 2015 - 18:40:59 +0800)
      
      CPU:   Freescale i.MX6UL rev1.0 792 MHz (running at 396 MHz)
      CPU:   Commercial temperature grade (0C to 95C)CPU:   Thermal invalid data, fuse: 0x0
       - invalid sensor device
       Reset cause: POR
       Board: MX6UL 14x14 EVK
       I2C:   ready
       DRAM:  512 MiB
       MMC:   FSL_SDHC: 0, FSL_SDHC: 1
       *** Warning - bad CRC, using default environment
      
       In:    serial
       Out:   serial
       Err:   serial
       Net:   CPU Net Initialization Failed
       No ethernet found.
       Hit any key to stop autoboot:  0
      Signed-off-by: default avatarPeng Fan <Peng.Fan@freescale.com>
      f0ff57b0