• Tom Rini's avatar
    ARM: Rework and correct barrier definitions · a78cd861
    Tom Rini authored
    As part of testing booting Linux kernels on Rockchip devices, it was
    discovered by Ziyuan Xu and Sandy Patterson that we had multiple and for
    some cases incomplete isb definitions.  This was causing a failure to
    boot of the Linux kernel.
    
    In order to solve this problem as well as cover any corner cases that we
    may also have had a number of changes are made in order to consolidate
    things.  First, <asm/barriers.h> now becomes the source of isb/dsb/dmb
    definitions.  This however introduces another complexity.  Due to
    needing to build SPL for 32bit tegra with -march=armv4 we need to borrow
    the __LINUX_ARM_ARCH__ logic from the Linux Kernel in a more complete
    form.  Move this from arch/arm/lib/Makefile to arch/arm/Makefile and add
    a comment about it.  Now that we can always know what the target CPU is
    capable off we can get always do the correct thing for the barrier.  The
    final part of this is that need to be consistent everywhere and call
    isb()/dsb()/dmb() and NOT call ISB/DSB/DMB in some cases and the
    function names in others.
    Reviewed-by: 's avatarStephen Warren <swarren@nvidia.com>
    Tested-by: 's avatarStephen Warren <swarren@nvidia.com>
    Acked-by: 's avatarZiyuan Xu <xzy.xu@rock-chips.com>
    Acked-by: 's avatarSandy Patterson <apatterson@sightlogix.com>
    Reported-by: 's avatarZiyuan Xu <xzy.xu@rock-chips.com>
    Reported-by: 's avatarSandy Patterson <apatterson@sightlogix.com>
    Signed-off-by: 's avatarTom Rini <trini@konsulko.com>
    a78cd861
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