am33xx.dtsi 15.1 KB
Newer Older
1 2 3 4 5 6 7 8 9 10
/*
 * Device Tree Source for AM33XX SoC
 *
 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

11
#include <dt-bindings/bus/ti-sysc.h>
12
#include <dt-bindings/gpio/gpio.h>
13
#include <dt-bindings/pinctrl/am33xx.h>
14
#include <dt-bindings/clock/am3.h>
15

16 17
/ {
	compatible = "ti,am33xx";
18
	interrupt-parent = <&intc>;
19 20
	#address-cells = <1>;
	#size-cells = <1>;
21
	chosen { };
22 23

	aliases {
24 25 26
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
27 28 29 30 31 32
		serial0 = &uart0;
		serial1 = &uart1;
		serial2 = &uart2;
		serial3 = &uart3;
		serial4 = &uart4;
		serial5 = &uart5;
33 34
		d-can0 = &dcan0;
		d-can1 = &dcan1;
35 36 37 38
		usb0 = &usb0;
		usb1 = &usb1;
		phy0 = &usb0_phy;
		phy1 = &usb1_phy;
39 40
		ethernet0 = &cpsw_emac0;
		ethernet1 = &cpsw_emac1;
41 42
		spi0 = &spi0;
		spi1 = &spi1;
43 44 45
	};

	cpus {
46 47
		#address-cells = <1>;
		#size-cells = <0>;
48 49
		cpu@0 {
			compatible = "arm,cortex-a8";
50
			enable-method = "ti,am3352";
51 52
			device_type = "cpu";
			reg = <0>;
53

54
			operating-points-v2 = <&cpu0_opp_table>;
55 56 57 58

			clocks = <&dpll_mpu_ck>;
			clock-names = "cpu";

59
			clock-latency = <300000>; /* From omap-cpufreq driver */
60 61 62 63 64 65 66 67 68 69 70
			cpu-idle-states = <&mpu_gate>;
		};

		idle-states {
			mpu_gate: mpu_gate {
				compatible = "arm,idle-state";
				entry-latency-us = <40>;
				exit-latency-us = <90>;
				min-residency-us = <300>;
				ti,idle-wkup-m3;
			};
71 72 73
		};
	};

74 75 76 77 78 79 80 81 82
	cpu0_opp_table: opp-table {
		compatible = "operating-points-v2-ti-cpu";
		syscon = <&scm_conf>;

		/*
		 * The three following nodes are marked with opp-suspend
		 * because the can not be enabled simultaneously on a
		 * single SoC.
		 */
83
		opp50-300000000 {
84 85 86 87 88 89
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <950000 931000 969000>;
			opp-supported-hw = <0x06 0x0010>;
			opp-suspend;
		};

90
		opp100-275000000 {
91 92 93 94 95 96
			opp-hz = /bits/ 64 <275000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0x00FF>;
			opp-suspend;
		};

97
		opp100-300000000 {
98 99 100 101 102 103
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0020>;
			opp-suspend;
		};

104
		opp100-500000000 {
105 106 107 108 109
			opp-hz = /bits/ 64 <500000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

110
		opp100-600000000 {
111 112 113 114 115
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1100000 1078000 1122000>;
			opp-supported-hw = <0x06 0x0040>;
		};

116
		opp120-600000000 {
117 118 119 120 121
			opp-hz = /bits/ 64 <600000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

122
		opp120-720000000 {
123 124 125 126 127
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1200000 1176000 1224000>;
			opp-supported-hw = <0x06 0x0080>;
		};

128
		oppturbo-720000000 {
129 130 131 132 133
			opp-hz = /bits/ 64 <720000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x01 0xFFFF>;
		};

134
		oppturbo-800000000 {
135 136 137 138 139
			opp-hz = /bits/ 64 <800000000>;
			opp-microvolt = <1260000 1234800 1285200>;
			opp-supported-hw = <0x06 0x0100>;
		};

140
		oppnitro-1000000000 {
141 142 143 144 145 146
			opp-hz = /bits/ 64 <1000000000>;
			opp-microvolt = <1325000 1298500 1351500>;
			opp-supported-hw = <0x04 0x0200>;
		};
	};

147
	pmu@4b000000 {
148 149
		compatible = "arm,cortex-a8-pmu";
		interrupts = <3>;
150 151
		reg = <0x4b000000 0x1000000>;
		ti,hwmods = "debugss";
152 153
	};

154
	/*
155
	 * The soc node represents the soc top level view. It is used for IPs
156 157 158 159 160 161 162
	 * that are not memory mapped in the MPU view or for the MPU itself.
	 */
	soc {
		compatible = "ti,omap-infra";
		mpu {
			compatible = "ti,omap3-mpu";
			ti,hwmods = "mpu";
163 164
			pm-sram = <&pm_sram_code
				   &pm_sram_data>;
165 166 167 168 169
		};
	};

	/*
	 * XXX: Use a flat representation of the AM33XX interconnect.
170 171
	 * The real AM33XX interconnect network is quite complex. Since
	 * it will not bring real advantage to represent that in DT
172 173 174 175 176 177 178 179 180 181
	 * for the moment, just use a fake OCP bus entry to represent
	 * the whole bus hierarchy.
	 */
	ocp {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		ti,hwmods = "l3_main";

182
		l4_wkup: interconnect@44c00000 {
183 184 185
			wkup_m3: wkup_m3@100000 {
				compatible = "ti,am3352-wkup-m3";
				reg = <0x100000 0x4000>,
186
				      <0x180000 0x2000>;
187 188 189 190
				reg-names = "umem", "dmem";
				ti,hwmods = "wkup_m3";
				ti,pm-firmware = "am335x-pm-firmware.elf";
			};
191 192 193 194 195 196 197 198
		};
		l4_per: interconnect@48000000 {
		};
		l4_fw: interconnect@47c00000 {
		};
		l4_fast: interconnect@4a000000 {
		};
		l4_mpuss: interconnect@4b140000 {
Tero Kristo's avatar
Tero Kristo committed
199 200
		};

201
		intc: interrupt-controller@48200000 {
202
			compatible = "ti,am33xx-intc";
203 204 205 206 207
			interrupt-controller;
			#interrupt-cells = <1>;
			reg = <0x48200000 0x1000>;
		};

208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232
		target-module@49000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49000000 0x4>;
			reg-names = "rev";
			clocks = <&l3_clkctrl AM3_L3_TPCC_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x49000000 0x10000>;

			edma: dma@0 {
				compatible = "ti,edma3-tpcc";
				reg = <0 0x10000>;
				reg-names = "edma3_cc";
				interrupts = <12 13 14>;
				interrupt-names = "edma3_ccint", "edma3_mperr",
						  "edma3_ccerrint";
				dma-requests = <64>;
				#dma-cells = <2>;

				ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
					   <&edma_tptc2 0>;

				ti,edma-memcpy-channels = <20 21>;
			};
233 234
		};

235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255
		target-module@49800000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49800000 0x4>,
			      <0x49800010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3_clkctrl AM3_L3_TPTC0_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x49800000 0x100000>;

			edma_tptc0: dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0 0x100000>;
				interrupts = <112>;
				interrupt-names = "edma3_tcerrint";
			};
256 257
		};

258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278
		target-module@49900000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49900000 0x4>,
			      <0x49900010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3_clkctrl AM3_L3_TPTC1_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x49900000 0x100000>;

			edma_tptc1: dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0 0x100000>;
				interrupts = <113>;
				interrupt-names = "edma3_tcerrint";
			};
279 280
		};

281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301
		target-module@49a00000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x49a00000 0x4>,
			      <0x49a00010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
			ti,sysc-midle = <SYSC_IDLE_FORCE>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_SMART>;
			clocks = <&l3_clkctrl AM3_L3_TPTC2_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x49a00000 0x100000>;

			edma_tptc2: dma@0 {
				compatible = "ti,edma3-tptc";
				reg = <0 0x100000>;
				interrupts = <114>;
				interrupt-names = "edma3_tcerrint";
			};
302 303
		};

304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329
		target-module@47810000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x478102fc 0x4>,
			      <0x47810110 0x4>,
			      <0x47810114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
					 SYSC_OMAP2_ENAWAKEUP |
					 SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x47810000 0x1000>;

			mmc3: mmc@0 {
				compatible = "ti,omap4-hsmmc";
				ti,needs-special-reset;
				interrupts = <29>;
				reg = <0x0 0x1000>;
			};
330 331
		};

332 333 334 335 336 337
		usb: target-module@47400000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x47400000 0x4>,
			      <0x47400010 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
338
					 SYSC_OMAP4_SOFTRESET)>;
339 340 341 342 343 344 345 346 347
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
			clock-names = "fck";
348 349
			#address-cells = <1>;
			#size-cells = <1>;
350
			ranges = <0x0 0x47400000 0x8000>;
351

352
			usb0_phy: usb-phy@1300 {
353
				compatible = "ti,am335x-usb-phy";
354
				reg = <0x1300 0x100>;
355
				reg-names = "phy";
356
				ti,ctrl_mod = <&usb_ctrl_mod>;
357
				#phy-cells = <0>;
358 359
			};

360
			usb0: usb@1400 {
361
				compatible = "ti,musb-am33xx";
362 363
				reg = <0x1400 0x400>,
				      <0x1000 0x200>;
364 365 366 367 368 369 370 371 372 373
				reg-names = "mc", "control";

				interrupts = <18>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb0_phy>;
374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396

				dmas = <&cppi41dma  0 0 &cppi41dma  1 0
					&cppi41dma  2 0 &cppi41dma  3 0
					&cppi41dma  4 0 &cppi41dma  5 0
					&cppi41dma  6 0 &cppi41dma  7 0
					&cppi41dma  8 0 &cppi41dma  9 0
					&cppi41dma 10 0 &cppi41dma 11 0
					&cppi41dma 12 0 &cppi41dma 13 0
					&cppi41dma 14 0 &cppi41dma  0 1
					&cppi41dma  1 1 &cppi41dma  2 1
					&cppi41dma  3 1 &cppi41dma  4 1
					&cppi41dma  5 1 &cppi41dma  6 1
					&cppi41dma  7 1 &cppi41dma  8 1
					&cppi41dma  9 1 &cppi41dma 10 1
					&cppi41dma 11 1 &cppi41dma 12 1
					&cppi41dma 13 1 &cppi41dma 14 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
397 398
			};

399
			usb1_phy: usb-phy@1b00 {
400
				compatible = "ti,am335x-usb-phy";
401
				reg = <0x1b00 0x100>;
402
				reg-names = "phy";
403
				ti,ctrl_mod = <&usb_ctrl_mod>;
404
				#phy-cells = <0>;
405 406
			};

407
			usb1: usb@1800 {
408
				compatible = "ti,musb-am33xx";
409 410
				reg = <0x1c00 0x400>,
				      <0x1800 0x200>;
411 412 413 414 415 416 417 418 419
				reg-names = "mc", "control";
				interrupts = <19>;
				interrupt-names = "mc";
				dr_mode = "otg";
				mentor,multipoint = <1>;
				mentor,num-eps = <16>;
				mentor,ram-bits = <12>;
				mentor,power = <500>;
				phys = <&usb1_phy>;
420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442

				dmas = <&cppi41dma 15 0 &cppi41dma 16 0
					&cppi41dma 17 0 &cppi41dma 18 0
					&cppi41dma 19 0 &cppi41dma 20 0
					&cppi41dma 21 0 &cppi41dma 22 0
					&cppi41dma 23 0 &cppi41dma 24 0
					&cppi41dma 25 0 &cppi41dma 26 0
					&cppi41dma 27 0 &cppi41dma 28 0
					&cppi41dma 29 0 &cppi41dma 15 1
					&cppi41dma 16 1 &cppi41dma 17 1
					&cppi41dma 18 1 &cppi41dma 19 1
					&cppi41dma 20 1 &cppi41dma 21 1
					&cppi41dma 22 1 &cppi41dma 23 1
					&cppi41dma 24 1 &cppi41dma 25 1
					&cppi41dma 26 1 &cppi41dma 27 1
					&cppi41dma 28 1 &cppi41dma 29 1>;
				dma-names =
					"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
					"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
					"rx14", "rx15",
					"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
					"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
					"tx14", "tx15";
443
			};
444

445
			cppi41dma: dma-controller@2000 {
446
				compatible = "ti,am3359-cppi41";
447 448 449 450
				reg =  <0x0000 0x1000>,
				       <0x2000 0x1000>,
				       <0x3000 0x1000>,
				       <0x4000 0x4000>;
451
				reg-names = "glue", "controller", "scheduler", "queuemgr";
452 453 454 455 456 457
				interrupts = <17>;
				interrupt-names = "glue";
				#dma-cells = <2>;
				#dma-channels = <30>;
				#dma-requests = <256>;
			};
458
		};
459

460
		ocmcram: sram@40300000 {
461 462
			compatible = "mmio-sram";
			reg = <0x40300000 0x10000>; /* 64k */
463 464 465 466
			ranges = <0x0 0x40300000 0x10000>;
			#address-cells = <1>;
			#size-cells = <1>;

467
			pm_sram_code: pm-code-sram@0 {
468 469 470 471 472
				compatible = "ti,sram";
				reg = <0x0 0x1000>;
				protect-exec;
			};

473
			pm_sram_data: pm-data-sram@1000 {
474 475 476 477
				compatible = "ti,sram";
				reg = <0x1000 0x1000>;
				pool;
			};
478 479
		};

480 481 482 483
		emif: emif@4c000000 {
			compatible = "ti,emif-am3352";
			reg = <0x4c000000 0x1000000>;
			ti,hwmods = "emif";
484
			interrupts = <101>;
485 486
			sram = <&pm_sram_code
				&pm_sram_data>;
487
			ti,no-idle;
488 489
		};

490 491 492
		gpmc: gpmc@50000000 {
			compatible = "ti,am3352-gpmc";
			ti,hwmods = "gpmc";
493
			ti,no-idle-on-init;
494 495
			reg = <0x50000000 0x2000>;
			interrupts = <100>;
496
			dmas = <&edma 52 0>;
497
			dma-names = "rxtx";
498 499
			gpmc,num-cs = <7>;
			gpmc,num-waitpins = <2>;
500 501
			#address-cells = <2>;
			#size-cells = <1>;
502 503
			interrupt-controller;
			#interrupt-cells = <2>;
504 505
			gpio-controller;
			#gpio-cells = <2>;
506 507
			status = "disabled";
		};
508

509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534
		sham_target: target-module@53100000 {
			compatible = "ti,sysc-omap3-sham", "ti,sysc";
			reg = <0x53100100 0x4>,
			      <0x53100110 0x4>,
			      <0x53100114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			/* Domains (P, C): per_pwrdm, l3_clkdm */
			clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x53100000 0x1000>;

			sham: sham@0 {
				compatible = "ti,omap4-sham";
				reg = <0 0x200>;
				interrupts = <109>;
				dmas = <&edma 36 0>;
				dma-names = "rx";
			};
535
		};
536

537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564
		aes_target: target-module@53500000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x53500080 0x4>,
			      <0x53500084 0x4>,
			      <0x53500088 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,syss-mask = <1>;
			/* Domains (P, C): per_pwrdm, l3_clkdm */
			clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x53500000 0x1000>;

			aes: aes@0 {
				compatible = "ti,omap4-aes";
				reg = <0 0xa0>;
				interrupts = <103>;
				dmas = <&edma 6 0>,
				       <&edma 5 0>;
				dma-names = "tx", "rx";
			};
565
		};
566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590

		target-module@56000000 {
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0x5600fe00 0x4>,
			      <0x5600fe10 0x4>;
			reg-names = "rev", "sysc";
			ti,sysc-midle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
			clock-names = "fck";
			resets = <&prm_gfx 0>;
			reset-names = "rstctrl";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x56000000 0x1000000>;

			/*
			 * Closed source PowerVR driver, no child device
			 * binding or driver in mainline
			 */
		};
591 592
	};
};
Tero Kristo's avatar
Tero Kristo committed
593

594
#include "am33xx-l4.dtsi"
595
#include "am33xx-clocks.dtsi"
Tero Kristo's avatar
Tero Kristo committed
596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621

&prcm {
	prm_per: prm@c00 {
		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
		reg = <0xc00 0x100>;
		#reset-cells = <1>;
	};

	prm_wkup: prm@d00 {
		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
		reg = <0xd00 0x100>;
		#reset-cells = <1>;
	};

	prm_device: prm@f00 {
		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
		reg = <0xf00 0x100>;
		#reset-cells = <1>;
	};

	prm_gfx: prm@1100 {
		compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
		reg = <0x1100 0x100>;
		#reset-cells = <1>;
	};
};