aspeed-g5.dtsi 32.5 KB
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// SPDX-License-Identifier: GPL-2.0+
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#include <dt-bindings/clock/aspeed-clock.h>
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/ {
	model = "Aspeed BMC";
	compatible = "aspeed,ast2500";
	#address-cells = <1>;
	#size-cells = <1>;
	interrupt-parent = <&vic>;

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	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		i2c9 = &i2c9;
		i2c10 = &i2c10;
		i2c11 = &i2c11;
		i2c12 = &i2c12;
		i2c13 = &i2c13;
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		serial0 = &uart1;
		serial1 = &uart2;
		serial2 = &uart3;
		serial3 = &uart4;
		serial4 = &uart5;
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		serial5 = &vuart;
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	};

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	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm1176jzf-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

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	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0>;
	};

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	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

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		fmc: spi@1e620000 {
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			reg = < 0x1e620000 0xc4
				0x20000000 0x10000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-fmc";
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			clocks = <&syscon ASPEED_CLK_AHB>;
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			status = "disabled";
			interrupts = <19>;
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
			flash@2 {
				reg = < 2 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
		};

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		spi1: spi@1e630000 {
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			reg = < 0x1e630000 0xc4
				0x30000000 0x08000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-spi";
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			clocks = <&syscon ASPEED_CLK_AHB>;
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			status = "disabled";
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
		};

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		spi2: spi@1e631000 {
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			reg = < 0x1e631000 0xc4
				0x38000000 0x08000000 >;
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "aspeed,ast2500-spi";
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			clocks = <&syscon ASPEED_CLK_AHB>;
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			status = "disabled";
			flash@0 {
				reg = < 0 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
			flash@1 {
				reg = < 1 >;
				compatible = "jedec,spi-nor";
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				spi-max-frequency = <50000000>;
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				status = "disabled";
			};
		};

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		vic: interrupt-controller@1e6c0080 {
			compatible = "aspeed,ast2400-vic";
			interrupt-controller;
			#interrupt-cells = <1>;
			valid-sources = <0xfefff7ff 0x0807ffff>;
			reg = <0x1e6c0080 0x80>;
		};

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		cvic: copro-interrupt-controller@1e6c2000 {
			compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
			valid-sources = <0xffffffff>;
			copro-sw-interrupts = <1>;
			reg = <0x1e6c2000 0x80>;
		};

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		mac0: ethernet@1e660000 {
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			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
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			reg = <0x1e660000 0x180>;
			interrupts = <2>;
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			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
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			status = "disabled";
		};

		mac1: ethernet@1e680000 {
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			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
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			reg = <0x1e680000 0x180>;
			interrupts = <3>;
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			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
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			status = "disabled";
		};

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		ehci0: usb@1e6a1000 {
			compatible = "aspeed,ast2500-ehci", "generic-ehci";
			reg = <0x1e6a1000 0x100>;
			interrupts = <5>;
			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
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			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb2ah_default>;
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			status = "disabled";
		};

		ehci1: usb@1e6a3000 {
			compatible = "aspeed,ast2500-ehci", "generic-ehci";
			reg = <0x1e6a3000 0x100>;
			interrupts = <13>;
			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
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			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb2bh_default>;
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			status = "disabled";
		};

		uhci: usb@1e6b0000 {
			compatible = "aspeed,ast2500-uhci", "generic-uhci";
			reg = <0x1e6b0000 0x100>;
			interrupts = <14>;
			#ports = <2>;
			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
			status = "disabled";
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			/*
			 * No default pinmux, it will follow EHCI, use an explicit pinmux
			 * override if you don't enable EHCI
			 */
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		};

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		vhub: usb-vhub@1e6a0000 {
			compatible = "aspeed,ast2500-usb-vhub";
			reg = <0x1e6a0000 0x300>;
			interrupts = <5>;
			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
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			aspeed,vhub-downstream-ports = <5>;
			aspeed,vhub-generic-endpoints = <15>;
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			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_usb2ad_default>;
			status = "disabled";
		};

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		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

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			edac: memory-controller@1e6e0000 {
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				compatible = "aspeed,ast2500-sdram-edac";
				reg = <0x1e6e0000 0x174>;
				interrupts = <0>;
				status = "disabled";
			};

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			syscon: syscon@1e6e2000 {
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				compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
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				reg = <0x1e6e2000 0x1a8>;
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				#address-cells = <1>;
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				#size-cells = <1>;
				ranges = <0 0x1e6e2000 0x1000>;
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				#clock-cells = <1>;
				#reset-cells = <1>;
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				p2a: p2a-control@2c {
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					compatible = "aspeed,ast2500-p2a-ctrl";
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					reg = <0x2c 0x4>;
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					status = "disabled";
				};
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				pinctrl: pinctrl@80 {
					compatible = "aspeed,ast2500-pinctrl";
					reg = <0x80 0x18>, <0xa0 0x10>;
					aspeed,external-nodes = <&gfx>, <&lhc>;
				};
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			};
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			rng: hwrng@1e6e2078 {
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				compatible = "timeriomem_rng";
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				reg = <0x1e6e2078 0x4>;
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				period = <1>;
				quality = <100>;
			};

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			gfx: display@1e6e6000 {
				compatible = "aspeed,ast2500-gfx", "syscon";
				reg = <0x1e6e6000 0x1000>;
				reg-io-width = <4>;
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				clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
				resets = <&syscon ASPEED_RESET_CRT1>;
				status = "disabled";
				interrupts = <0x19>;
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			};
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			adc: adc@1e6e9000 {
				compatible = "aspeed,ast2500-adc";
				reg = <0x1e6e9000 0xb0>;
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				clocks = <&syscon ASPEED_CLK_APB>;
				resets = <&syscon ASPEED_RESET_ADC>;
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				#io-channel-cells = <1>;
				status = "disabled";
			};
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			video: video@1e700000 {
				compatible = "aspeed,ast2500-video-engine";
				reg = <0x1e700000 0x1000>;
				clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
					 <&syscon ASPEED_CLK_GATE_ECLK>;
				clock-names = "vclk", "eclk";
				interrupts = <7>;
				status = "disabled";
			};

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			sram: sram@1e720000 {
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				compatible = "mmio-sram";
				reg = <0x1e720000 0x9000>;	// 36K
			};
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			sdmmc: sd-controller@1e740000 {
				compatible = "aspeed,ast2500-sd-controller";
				reg = <0x1e740000 0x100>;
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e740000 0x10000>;
				clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
				status = "disabled";

				sdhci0: sdhci@100 {
					compatible = "aspeed,ast2500-sdhci";
					reg = <0x100 0x100>;
					interrupts = <26>;
					sdhci,auto-cmd12;
					clocks = <&syscon ASPEED_CLK_SDIO>;
					status = "disabled";
				};

				sdhci1: sdhci@200 {
					compatible = "aspeed,ast2500-sdhci";
					reg = <0x200 0x100>;
					interrupts = <26>;
					sdhci,auto-cmd12;
					clocks = <&syscon ASPEED_CLK_SDIO>;
					status = "disabled";
				};
			};

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			gpio: gpio@1e780000 {
				#gpio-cells = <2>;
				gpio-controller;
				compatible = "aspeed,ast2500-gpio";
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				reg = <0x1e780000 0x200>;
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				interrupts = <20>;
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				gpio-ranges = <&pinctrl 0 0 232>;
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				clocks = <&syscon ASPEED_CLK_APB>;
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				interrupt-controller;
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				#interrupt-cells = <2>;
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			};
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			sgpio: sgpio@1e780200 {
				#gpio-cells = <2>;
				compatible = "aspeed,ast2500-sgpio";
				gpio-controller;
				interrupts = <40>;
				reg = <0x1e780200 0x0100>;
				clocks = <&syscon ASPEED_CLK_APB>;
				interrupt-controller;
				ngpios = <8>;
				bus-frequency = <12000000>;
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_sgpm_default>;
				status = "disabled";
			};

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			rtc: rtc@1e781000 {
				compatible = "aspeed,ast2500-rtc";
				reg = <0x1e781000 0x18>;
				status = "disabled";
			};

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			timer: timer@1e782000 {
				/* This timer is a Faraday FTTMR010 derivative */
				compatible = "aspeed,ast2400-timer";
				reg = <0x1e782000 0x90>;
				interrupts = <16 17 18 35 36 37 38 39>;
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				clocks = <&syscon ASPEED_CLK_APB>;
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				clock-names = "PCLK";
			};
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			uart1: serial@1e783000 {
				compatible = "ns16550a";
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				reg = <0x1e783000 0x20>;
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				reg-shift = <2>;
				interrupts = <9>;
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				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
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				resets = <&lpc_reset 4>;
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				no-loopback-test;
				status = "disabled";
			};
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			uart5: serial@1e784000 {
				compatible = "ns16550a";
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				reg = <0x1e784000 0x20>;
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				reg-shift = <2>;
				interrupts = <10>;
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				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
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				no-loopback-test;
				status = "disabled";
			};
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			wdt1: watchdog@1e785000 {
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				compatible = "aspeed,ast2500-wdt";
				reg = <0x1e785000 0x20>;
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				clocks = <&syscon ASPEED_CLK_APB>;
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			};
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			wdt2: watchdog@1e785020 {
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				compatible = "aspeed,ast2500-wdt";
				reg = <0x1e785020 0x20>;
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				clocks = <&syscon ASPEED_CLK_APB>;
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			};
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			wdt3: watchdog@1e785040 {
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				compatible = "aspeed,ast2500-wdt";
				reg = <0x1e785040 0x20>;
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				clocks = <&syscon ASPEED_CLK_APB>;
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				status = "disabled";
			};
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			pwm_tacho: pwm-tacho-controller@1e786000 {
				compatible = "aspeed,ast2500-pwm-tacho";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x1e786000 0x1000>;
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				clocks = <&syscon ASPEED_CLK_24M>;
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				resets = <&syscon ASPEED_RESET_PWM>;
				status = "disabled";
			};

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			vuart: serial@1e787000 {
				compatible = "aspeed,ast2500-vuart";
				reg = <0x1e787000 0x40>;
				reg-shift = <2>;
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				interrupts = <8>;
				clocks = <&syscon ASPEED_CLK_APB>;
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				no-loopback-test;
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				aspeed,sirq-polarity-sense = <&syscon 0x70 25>;
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				status = "disabled";
			};

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			lpc: lpc@1e789000 {
				compatible = "aspeed,ast2500-lpc", "simple-mfd";
				reg = <0x1e789000 0x1000>;
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				#address-cells = <1>;
				#size-cells = <1>;
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				ranges = <0x0 0x1e789000 0x1000>;
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				lpc_bmc: lpc-bmc@0 {
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					compatible = "aspeed,ast2500-lpc-bmc", "simple-mfd", "syscon";
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					reg = <0x0 0x80>;
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					reg-io-width = <4>;

					#address-cells = <1>;
					#size-cells = <1>;
					ranges = <0x0 0x0 0x80>;

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					kcs1: kcs@24 {
						compatible = "aspeed,ast2500-kcs-bmc-v2";
						reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
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						interrupts = <8>;
						status = "disabled";
					};
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					kcs2: kcs@28 {
						compatible = "aspeed,ast2500-kcs-bmc-v2";
						reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
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						interrupts = <8>;
						status = "disabled";
					};
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					kcs3: kcs@2c {
						compatible = "aspeed,ast2500-kcs-bmc-v2";
						reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
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						interrupts = <8>;
						status = "disabled";
					};
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				};
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				lpc_host: lpc-host@80 {
					compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
					reg = <0x80 0x1e0>;
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					reg-io-width = <4>;
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					#address-cells = <1>;
					#size-cells = <1>;
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					ranges = <0x0 0x80 0x1e0>;
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					kcs4: kcs@94 {
						compatible = "aspeed,ast2500-kcs-bmc-v2";
						reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
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						interrupts = <8>;
						status = "disabled";
					};

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					lpc_ctrl: lpc-ctrl@0 {
						compatible = "aspeed,ast2500-lpc-ctrl";
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						reg = <0x0 0x10>;
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						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
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						status = "disabled";
					};

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					lpc_snoop: lpc-snoop@10 {
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						compatible = "aspeed,ast2500-lpc-snoop";
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						reg = <0x10 0x8>;
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						interrupts = <8>;
						status = "disabled";
					};
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					lpc_reset: reset-controller@18 {
						compatible = "aspeed,ast2500-lpc-reset";
						reg = <0x18 0x4>;
						#reset-cells = <1>;
					};

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					lhc: lhc@20 {
						compatible = "aspeed,ast2500-lhc";
						reg = <0x20 0x24 0x48 0x8>;
					};


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					ibt: ibt@c0 {
						compatible = "aspeed,ast2500-ibt-bmc";
						reg = <0xc0 0x18>;
						interrupts = <8>;
						status = "disabled";
					};
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				};
			};
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			uart2: serial@1e78d000 {
				compatible = "ns16550a";
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				reg = <0x1e78d000 0x20>;
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				reg-shift = <2>;
				interrupts = <32>;
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				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
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				resets = <&lpc_reset 5>;
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				no-loopback-test;
				status = "disabled";
			};
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			uart3: serial@1e78e000 {
				compatible = "ns16550a";
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				reg = <0x1e78e000 0x20>;
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				reg-shift = <2>;
				interrupts = <33>;
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				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
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				resets = <&lpc_reset 6>;
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				no-loopback-test;
				status = "disabled";
			};
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			uart4: serial@1e78f000 {
				compatible = "ns16550a";
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				reg = <0x1e78f000 0x20>;
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				reg-shift = <2>;
				interrupts = <34>;
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				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
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				resets = <&lpc_reset 7>;
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				no-loopback-test;
				status = "disabled";
			};
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			i2c: bus@1e78a000 {
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				compatible = "simple-bus";
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0 0x1e78a000 0x1000>;
			};
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		};
	};
};
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&i2c {
	i2c_ic: interrupt-controller@0 {
		#interrupt-cells = <1>;
		compatible = "aspeed,ast2500-i2c-ic";
		reg = <0x0 0x40>;
		interrupts = <12>;
		interrupt-controller;
	};
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	i2c0: i2c-bus@40 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x40 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <0>;
		interrupt-parent = <&i2c_ic>;
		status = "disabled";
		/* Does not need pinctrl properties */
	};
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	i2c1: i2c-bus@80 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x80 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <1>;
		interrupt-parent = <&i2c_ic>;
		status = "disabled";
		/* Does not need pinctrl properties */
	};
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	i2c2: i2c-bus@c0 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0xc0 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <2>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c3_default>;
		status = "disabled";
	};
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	i2c3: i2c-bus@100 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x100 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <3>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c4_default>;
		status = "disabled";
	};
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	i2c4: i2c-bus@140 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x140 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <4>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c5_default>;
		status = "disabled";
	};
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	i2c5: i2c-bus@180 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x180 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <5>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c6_default>;
		status = "disabled";
	};
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	i2c6: i2c-bus@1c0 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x1c0 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <6>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c7_default>;
		status = "disabled";
	};
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	i2c7: i2c-bus@300 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x300 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <7>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c8_default>;
		status = "disabled";
	};
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	i2c8: i2c-bus@340 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x340 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <8>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c9_default>;
		status = "disabled";
	};
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	i2c9: i2c-bus@380 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x380 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <9>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c10_default>;
		status = "disabled";
	};
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	i2c10: i2c-bus@3c0 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x3c0 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <10>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c11_default>;
		status = "disabled";
	};
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	i2c11: i2c-bus@400 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x400 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <11>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c12_default>;
		status = "disabled";
	};
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	i2c12: i2c-bus@440 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x440 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <12>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c13_default>;
		status = "disabled";
	};
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	i2c13: i2c-bus@480 {
		#address-cells = <1>;
		#size-cells = <0>;
		#interrupt-cells = <1>;

		reg = <0x480 0x40>;
		compatible = "aspeed,ast2500-i2c-bus";
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		clocks = <&syscon ASPEED_CLK_APB>;
		resets = <&syscon ASPEED_RESET_I2C>;
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		bus-frequency = <100000>;
		interrupts = <13>;
		interrupt-parent = <&i2c_ic>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_i2c14_default>;
		status = "disabled";
	};
};
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&pinctrl {
	pinctrl_acpi_default: acpi_default {
		function = "ACPI";
		groups = "ACPI";
	};
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	pinctrl_adc0_default: adc0_default {
		function = "ADC0";
		groups = "ADC0";
	};
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	pinctrl_adc1_default: adc1_default {
		function = "ADC1";
		groups = "ADC1";
	};
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	pinctrl_adc10_default: adc10_default {
		function = "ADC10";
		groups = "ADC10";
	};
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	pinctrl_adc11_default: adc11_default {
		function = "ADC11";
		groups = "ADC11";
	};
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	pinctrl_adc12_default: adc12_default {
		function = "ADC12";
		groups = "ADC12";
	};
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	pinctrl_adc13_default: adc13_default {
		function = "ADC13";
		groups = "ADC13";
	};
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	pinctrl_adc14_default: adc14_default {
		function = "ADC14";
		groups = "ADC14";
	};
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	pinctrl_adc15_default: adc15_default {
		function = "ADC15";
		groups = "ADC15";
	};
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	pinctrl_adc2_default: adc2_default {
		function = "ADC2";
		groups = "ADC2";
	};
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	pinctrl_adc3_default: adc3_default {
		function = "ADC3";
		groups = "ADC3";
	};
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	pinctrl_adc4_default: adc4_default {
		function = "ADC4";
		groups = "ADC4";
	};
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	pinctrl_adc5_default: adc5_default {
		function = "ADC5";
		groups = "ADC5";
	};
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	pinctrl_adc6_default: adc6_default {
		function = "ADC6";
		groups = "ADC6";
	};
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	pinctrl_adc7_default: adc7_default {
		function = "ADC7";
		groups = "ADC7";
	};
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	pinctrl_adc8_default: adc8_default {
		function = "ADC8";
		groups = "ADC8";
	};
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	pinctrl_adc9_default: adc9_default {
		function = "ADC9";
		groups = "ADC9";
	};
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	pinctrl_bmcint_default: bmcint_default {
		function = "BMCINT";
		groups = "BMCINT";
	};
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	pinctrl_ddcclk_default: ddcclk_default {
		function = "DDCCLK";
		groups = "DDCCLK";
	};
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	pinctrl_ddcdat_default: ddcdat_default {
		function = "DDCDAT";
		groups = "DDCDAT";
	};
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	pinctrl_espi_default: espi_default {
		function = "ESPI";
		groups = "ESPI";
	};
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	pinctrl_fwspics1_default: fwspics1_default {
		function = "FWSPICS1";
		groups = "FWSPICS1";
	};
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	pinctrl_fwspics2_default: fwspics2_default {
		function = "FWSPICS2";
		groups = "FWSPICS2";
	};
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	pinctrl_gpid0_default: gpid0_default {
		function = "GPID0";
		groups = "GPID0";
	};
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	pinctrl_gpid2_default: gpid2_default {
		function = "GPID2";
		groups = "GPID2";
	};
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	pinctrl_gpid4_default: gpid4_default {
		function = "GPID4";
		groups = "GPID4";
	};
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	pinctrl_gpid6_default: gpid6_default {
		function = "GPID6";
		groups = "GPID6";
	};
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	pinctrl_gpie0_default: gpie0_default {
		function = "GPIE0";
		groups = "GPIE0";
	};
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	pinctrl_gpie2_default: gpie2_default {
		function = "GPIE2";
		groups = "GPIE2";
	};
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	pinctrl_gpie4_default: gpie4_default {
		function = "GPIE4";
		groups = "GPIE4";
	};
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	pinctrl_gpie6_default: gpie6_default {
		function = "GPIE6";
		groups = "GPIE6";
	};
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	pinctrl_i2c10_default: i2c10_default {
		function = "I2C10";
		groups = "I2C10";
	};
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	pinctrl_i2c11_default: i2c11_default {
		function = "I2C11";
		groups = "I2C11";
	};
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	pinctrl_i2c12_default: i2c12_default {
		function = "I2C12";
		groups = "I2C12";
	};
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	pinctrl_i2c13_default: i2c13_default {
		function = "I2C13";
		groups = "I2C13";
	};
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	pinctrl_i2c14_default: i2c14_default {
		function = "I2C14";
		groups = "I2C14";
	};
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	pinctrl_i2c3_default: i2c3_default {
		function = "I2C3";
		groups = "I2C3";
	};
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	pinctrl_i2c4_default: i2c4_default {
		function = "I2C4";
		groups = "I2C4";
	};
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	pinctrl_i2c5_default: i2c5_default {
		function = "I2C5";
		groups = "I2C5";
	};
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	pinctrl_i2c6_default: i2c6_default {
		function = "I2C6";
		groups = "I2C6";
	};
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	pinctrl_i2c7_default: i2c7_default {
		function = "I2C7";
		groups = "I2C7";
	};
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	pinctrl_i2c8_default: i2c8_default {
		function = "I2C8";
		groups = "I2C8";
	};
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	pinctrl_i2c9_default: i2c9_default {
		function = "I2C9";
		groups = "I2C9";
	};
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	pinctrl_lad0_default: lad0_default {
		function = "LAD0";
		groups = "LAD0";
	};
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	pinctrl_lad1_default: lad1_default {
		function = "LAD1";
		groups = "LAD1";
	};
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	pinctrl_lad2_default: lad2_default {
		function = "LAD2";
		groups = "LAD2";
	};
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	pinctrl_lad3_default: lad3_default {
		function = "LAD3";
		groups = "LAD3";
	};
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	pinctrl_lclk_default: lclk_default {
		function = "LCLK";
		groups = "LCLK";
	};
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	pinctrl_lframe_default: lframe_default {
		function = "LFRAME";
		groups = "LFRAME";
	};
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	pinctrl_lpchc_default: lpchc_default {
		function = "LPCHC";
		groups = "LPCHC";
	};
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	pinctrl_lpcpd_default: lpcpd_default {
		function = "LPCPD";
		groups = "LPCPD";
	};
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	pinctrl_lpcplus_default: lpcplus_default {
		function = "LPCPLUS";
		groups = "LPCPLUS";
	};
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	pinctrl_lpcpme_default: lpcpme_default {
		function = "LPCPME";
		groups = "LPCPME";
	};