bcm2835-common.dtsi 4.09 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
// SPDX-License-Identifier: GPL-2.0

/* This include file covers the common peripherals and configuration between
 * bcm2835, bcm2836 and bcm2837 implementations.
 */

/ {
	interrupt-parent = <&intc>;

	soc {
		dma: dma@7e007000 {
			compatible = "brcm,bcm2835-dma";
			reg = <0x7e007000 0xf00>;
			interrupts = <1 16>,
				     <1 17>,
				     <1 18>,
				     <1 19>,
				     <1 20>,
				     <1 21>,
				     <1 22>,
				     <1 23>,
				     <1 24>,
				     <1 25>,
				     <1 26>,
				     /* dma channel 11-14 share one irq */
				     <1 27>,
				     <1 27>,
				     <1 27>,
				     <1 27>,
				     /* unused shared irq for all channels */
				     <1 28>;
			interrupt-names = "dma0",
					  "dma1",
					  "dma2",
					  "dma3",
					  "dma4",
					  "dma5",
					  "dma6",
					  "dma7",
					  "dma8",
					  "dma9",
					  "dma10",
					  "dma11",
					  "dma12",
					  "dma13",
					  "dma14",
					  "dma-shared-all";
			#dma-cells = <1>;
			brcm,dma-channel-mask = <0x7f35>;
		};

		intc: interrupt-controller@7e00b200 {
			compatible = "brcm,bcm2835-armctrl-ic";
			reg = <0x7e00b200 0x200>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		pm: watchdog@7e100000 {
			compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
			#power-domain-cells = <1>;
			#reset-cells = <1>;
			reg = <0x7e100000 0x114>,
			      <0x7e00a000 0x24>;
			clocks = <&clocks BCM2835_CLOCK_V3D>,
				 <&clocks BCM2835_CLOCK_PERI_IMAGE>,
				 <&clocks BCM2835_CLOCK_H264>,
				 <&clocks BCM2835_CLOCK_ISP>;
			clock-names = "v3d", "peri_image", "h264", "isp";
			system-power-controller;
		};

73 74 75 76 77 78
		rng@7e104000 {
			compatible = "brcm,bcm2835-rng";
			reg = <0x7e104000 0x10>;
			interrupts = <2 29>;
		};

79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199
		pixelvalve@7e206000 {
			compatible = "brcm,bcm2835-pixelvalve0";
			reg = <0x7e206000 0x100>;
			interrupts = <2 13>; /* pwa0 */
		};

		pixelvalve@7e207000 {
			compatible = "brcm,bcm2835-pixelvalve1";
			reg = <0x7e207000 0x100>;
			interrupts = <2 14>; /* pwa1 */
		};

		thermal: thermal@7e212000 {
			compatible = "brcm,bcm2835-thermal";
			reg = <0x7e212000 0x8>;
			clocks = <&clocks BCM2835_CLOCK_TSENS>;
			#thermal-sensor-cells = <0>;
			status = "disabled";
		};

		i2c2: i2c@7e805000 {
			compatible = "brcm,bcm2835-i2c";
			reg = <0x7e805000 0x1000>;
			interrupts = <2 21>;
			clocks = <&clocks BCM2835_CLOCK_VPU>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "okay";
		};

		pixelvalve@7e807000 {
			compatible = "brcm,bcm2835-pixelvalve2";
			reg = <0x7e807000 0x100>;
			interrupts = <2 10>; /* pixelvalve */
		};

		hdmi: hdmi@7e902000 {
			compatible = "brcm,bcm2835-hdmi";
			reg = <0x7e902000 0x600>,
			      <0x7e808000 0x100>;
			interrupts = <2 8>, <2 9>;
			ddc = <&i2c2>;
			clocks = <&clocks BCM2835_PLLH_PIX>,
				 <&clocks BCM2835_CLOCK_HSM>;
			clock-names = "pixel", "hdmi";
			dmas = <&dma 17>;
			dma-names = "audio-rx";
			status = "disabled";
		};

		v3d: v3d@7ec00000 {
			compatible = "brcm,bcm2835-v3d";
			reg = <0x7ec00000 0x1000>;
			interrupts = <1 10>;
		};

		vc4: gpu {
			compatible = "brcm,bcm2835-vc4";
		};
	};
};

&cpu_thermal {
	thermal-sensors = <&thermal>;
};

&gpio {
	i2c_slave_gpio18: i2c_slave_gpio18 {
		brcm,pins = <18 19 20 21>;
		brcm,function = <BCM2835_FSEL_ALT3>;
	};

	jtag_gpio4: jtag_gpio4 {
		brcm,pins = <4 5 6 12 13>;
		brcm,function = <BCM2835_FSEL_ALT5>;
	};

	pwm0_gpio12: pwm0_gpio12 {
		brcm,pins = <12>;
		brcm,function = <BCM2835_FSEL_ALT0>;
	};
	pwm0_gpio18: pwm0_gpio18 {
		brcm,pins = <18>;
		brcm,function = <BCM2835_FSEL_ALT5>;
	};
	pwm0_gpio40: pwm0_gpio40 {
		brcm,pins = <40>;
		brcm,function = <BCM2835_FSEL_ALT0>;
	};
	pwm1_gpio13: pwm1_gpio13 {
		brcm,pins = <13>;
		brcm,function = <BCM2835_FSEL_ALT0>;
	};
	pwm1_gpio19: pwm1_gpio19 {
		brcm,pins = <19>;
		brcm,function = <BCM2835_FSEL_ALT5>;
	};
	pwm1_gpio41: pwm1_gpio41 {
		brcm,pins = <41>;
		brcm,function = <BCM2835_FSEL_ALT0>;
	};
	pwm1_gpio45: pwm1_gpio45 {
		brcm,pins = <45>;
		brcm,function = <BCM2835_FSEL_ALT0>;
	};
};

&i2s {
	dmas = <&dma 2>, <&dma 3>;
	dma-names = "tx", "rx";
};

&sdhost {
	dmas = <&dma 13>;
	dma-names = "rx-tx";
};

&spi {
	dmas = <&dma 6>, <&dma 7>;
	dma-names = "tx", "rx";
};