• Florian Fainelli's avatar
    ARM: dts: NSP: Fix PPI interrupt types · 5f1aa51c
    Florian Fainelli authored
    Booting a kernel results in the kernel warning us about the following
    PPI interrupts configuration:
    [    0.105127] smp: Bringing up secondary CPUs ...
    [    0.110545] GIC: PPI11 is secure or misconfigured
    [    0.110551] GIC: PPI13 is secure or misconfigured
    
    Fix this by using the appropriate edge configuration for PPI11 and
    PPI13, this is similar to what was fixed for Northstar (BCM5301X) in
    commit 0e34079c ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt
    flags").
    
    Fixes: 7b2e987d ("ARM: NSP: add minimal Northstar Plus device tree")
    Fixes: 1a9d53ca
    
     ("ARM: dts: NSP: Add TWD Support to DT")
    Acked-by: default avatarJon Mason <jon.mason@broadcom.com>
    Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
    5f1aa51c
bcm-nsp.dtsi 14.9 KB