Commit 738b150e authored by Tony Lindgren's avatar Tony Lindgren
Browse files

ARM: dts: omap4-droid4: Fix occasional lost wakeirq for uart1

Looks like using the UART CTS pin does not always trigger for a wake-up
when the SoC is idle.

This is probably because the modem first uses gpio_149 to signal the SoC
that data will be sent, and the CTS will only get used later when the
data transfer is starting.

Let's fix the issue by configuring the gpio_149 pad as the wakeirq for
UART. We have gpio_149 managed by the USB PHY for powering up the right
USB mode, and after that, the gpio gets recycled as the modem wake-up
pin. If needeed, the USB PHY can also later on be configured to use
gpio_149 pad as the wakeirq as a shared irq.

Let's also configure the missing properties for uart-has-rtscts and
current-speed for the modem port while at it. We already configure the
hardware flow control pins with uart1_pins pinctrl setting.

Cc: Merlijn Wajer <>
Cc: Pavel Machek <>
Cc: Sebastian Reichel <>
Signed-off-by: default avatarTony Lindgren <>
parent 30fa60c6
......@@ -723,14 +723,18 @@ &timer9 {
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
* uart1 wakeirq.
* The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
* for wake-up events for both the USB PHY and the UART. We can use gpio_149
* pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
* have gpio_149 trigger before the UART transfer starts.
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
&omap4_pmx_core 0xfc>;
&omap4_pmx_core 0x110>;
current-speed = <115200>;
&uart3 {
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