Commit 9e2f2568 authored by Borislav Petkov's avatar Borislav Petkov Committed by Sasha Levin
Browse files

EDAC/amd64: Read back the scrub rate PCI register on F15h

commit ee470bb2 upstream.


  da92110d ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")

added support for F15h, model 0x60 CPUs but in doing so, missed to read
back SCRCTRL PCI config register on F15h CPUs which are *not* model
0x60. Add that read so that doing

  $ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate

can show the previously set DRAM scrub rate.

Fixes: da92110d

 ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")
Reported-by: default avatarAnders Andersson <>
Signed-off-by: default avatarBorislav Petkov <>
Cc: <> #v4.4..

Signed-off-by: default avatarGreg Kroah-Hartman <>
parent 7f7f6661
......@@ -272,6 +272,8 @@ static int get_scrub_rate(struct mem_ctl_info *mci)
if (pvt->model == 0x60)
amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval);
amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
} else {
amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval);
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