Commit be0ec060 authored by Hamish Martin's avatar Hamish Martin Committed by Florian Fainelli
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ARM: dts: bcm: HR2: Fix PPI interrupt types

These error messages are output when booting on a BCM HR2 system:
    GIC: PPI11 is secure or misconfigured
    GIC: PPI13 is secure or misconfigured

Per ARM documentation these interrupts are triggered on a rising edge.
See ARM Cortex A-9 MPCore Technical Reference Manual, Revision r4p1,
Section 3.3.8 Interrupt Configuration Registers.

The same issue was resolved for NSP systems in commit 5f1aa51c
("ARM: dts: NSP: Fix PPI interrupt types").

Fixes: b9099ec7

 ("ARM: dts: Add Broadcom Hurricane 2 DTS include file")
Signed-off-by: default avatarHamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent 58bb90ab
......@@ -75,7 +75,7 @@ a9pll: arm_clk@0 {
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
};
......@@ -83,7 +83,7 @@ twd-timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
......@@ -91,7 +91,7 @@ twd-watchdog@20620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};
......
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