- 30 Jun, 2020 1 commit
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Matthew Hagan authored
[ Upstream commit b9dbe010 ] Currently the PL330 is enabled by default. However if left in IDM reset, as is the case with the Meraki and Synology NSP devices, the system will hang when probing for the PL330's AMBA peripheral ID. We therefore should be able to disable it in these cases. The PL330 is also included among of the list of peripherals put into coherent mode, so "dma-coherent" has been added here as well. Fixes: 5fa1026a ("ARM: dts: NSP: Add PL330 support") Signed-off-by:
Matthew Hagan <mnhagan88@gmail.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
Sasha Levin <sashal@kernel.org>
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- 23 Jun, 2019 1 commit
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Florian Fainelli authored
Fix the bulk of the unit_address_vs_reg warnings and unnecessary \#address-cells/#size-cells without "ranges" or child "reg" property Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 05 Nov, 2018 1 commit
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Florian Fainelli authored
All boards replicate the aliases node, move the aliases node to bcm-nsp.dtsi and add all the serial and ethernet ports such that a boot program like u-boot can populate MAC addresses accordingly. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 07 Aug, 2017 1 commit
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Jon Mason authored
This uses the existing Northstar USB3 PHY driver to enable the USB3 ports on NSP. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 18 Mar, 2017 1 commit
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Jon Mason authored
Add the EHCI and OHCI entries to the Northstar Plus device tree files. Signed-off-by:
Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 16 Mar, 2017 1 commit
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Jon Mason authored
The libgpio code pre-sets the GPIO values for the gpio-reset in the device tree. This results in the device being reset during bringup. To prevent this pre-setting, use the "open-source" flag in the device tree. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Fixes: b1aaf88b ("ARM: dts: NSP: Add GPIO reboot method to bcm958625hr DTS file") Fixes: 10baed1c ("ARM: dts: NSP: Add GPIO reboot method to bcm958625xmc DTS file") Fixes: 088e3148 ("ARM: dts: NSP: Add new DT file for bcm958522er") Fixes: e3227c12 ("ARM: dts: NSP: Add new DT file for bcm958525er") Fixes: 2f8bc002 ("ARM: dts: NSP: Add new DT file for bcm958622hr") Fixes: d454c376 ("ARM: dts: NSP: Add new DT file for bcm958623hr") Fixes: f27eacf2 ("ARM: dts: NSP: Add new DT file for bcm988312hr") Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 19 Jan, 2017 2 commits
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Jon Mason authored
QSPI device tree entries are present in bcm958625k, but missing from bcm958522er, bcm958525er, bcm958525xmc, bcm958622hr, bcm958623hr, bcm958625hr, and bcm988312hr. Duplicate the entry in bcm958625k for all of those that are missing it (as they are identical). Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
The QSPI entry was added out of the sequental order that the rest of the DTSI file is in. Move it to make it fit in properly. Also, some other entries have been added in a non-alphabetical order in the DTS files, making them different from the other NSP DTS files. Move the relevant peices to make it match. Finally, remove errant new lines. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 09 Aug, 2016 5 commits
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Jon Mason authored
Create a new device tree file for the Broadcom Northstar Plus bcm958522er SVK. This SVK has 2GB RAM, 2 ports Ethernet, 2 PCI slots, and 1 UART. Also, it has the ability to reboot via GPIO. To be added in the future is support for the USB. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
Create a new device tree file for the Broadcom Northstar Plus bcm958525er SVK. This SVK has 2GB RAM, 2 ports Ethernet, 2 eSATA, 2 PCI slots, and 1 UART. Also, it has the ability to reboot via GPIO. To be added in the future is support for the USB. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
Add the ability to reboot the bcm958625xmc board via GPIO. Unfortunately, not all of the NSP based boards use the same GPIO pin and one doesn't have the ability to reboot via GPIO at all. So, this will need to be specified per DTS file. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
Add 1GB of memory starting at physical offset 0x6000_0000. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
Enable SATA on bcm958625xmc and add the i2c devices present. Signed-off-by:
Jon Mason <jon.mason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 10 Jun, 2016 1 commit
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Jon Mason authored
The BCM958525XMC board is a smaller form factor typically used as controller boards for switches. This smaller board has less devices pinned out, so only a few need be populated in the device tree. Signed-off-by:
Jon Mason <jonmason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 31 May, 2016 1 commit
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Jon Mason authored
Create a new device tree file for the Broadcom Northstar Plus HR SVK. This SVK is a smaller form factor, and thus only has 2 PCI slots and 1 UART. Also, it has the ability to reboot via GPIO (instead of the processor reset). Signed-off-by:
Jon Mason <jonmason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 07 Dec, 2015 1 commit
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Yendapally Reddy Dhananjaya Reddy authored
This enables the pinctrl support for Broadcom NSP SoC Signed-off-by:
Yendapally Reddy Dhananjaya Reddy <yrdreddy@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 16 Nov, 2015 2 commits
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Jon Mason authored
Add NAND support to the device tree for the Broadcom Northstar Plus SoC. Since no driver changes are needed to enable this hardware, only the device tree changes are required to make this functional. Signed-off-by:
Jon Mason <jonmason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Jon Mason authored
Add PCI support to the Northstar Plus SoC. This uses the existing pcie-iproc driver. So, all that is needed is device tree entries in the DTS. Signed-off-by:
Jon Mason <jonmason@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 14 Sep, 2015 1 commit
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Jon Mason authored
Add a very minimalistic set of Northstar Plus Device Tree files which describes the SoC and the BCM958625 implementation. The perpherials described are: ARM Cortex A9 CPU 2 8250 UARTs ARM GIC PL310 L2 Cache ARM A9 Global timer Signed-off-by:
Kapil Hali <kapilh@broadcom.com> Signed-off-by:
Jon Mason <jonmason@broadcom.com> Reviewed-by:
Ray Jui <rjui@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 02 Mar, 2015 1 commit
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Jonathan Richardson authored
DT file to enable the Wireless Audio reference design based on the BCM58305. Reviewed-by:
Ray Jui <rjui@broadcom.com> Reviewed-by:
Scott Branden <sbranden@broadcom.com> Tested-by:
Scott Branden <sbranden@broadcom.com> Signed-off-by:
Jonathan Richardson <jonathar@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 12 Nov, 2014 1 commit
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Scott Branden authored
DT files to enable cygnus consisting on reference designs and cygnus core configuration. Reviewed-by:
Ray Jui <rjui@broadcom.com> Reviewed-by:
Arun Parameswaran <aparames@broadcom.com> Tested-by:
Jonathan Richardson <jonathar@broadcom.com> Reviewed-by:
JD (Jiandong) Zheng <jdzheng@broadcom.com> Signed-off-by:
Scott Branden <sbranden@broadcom.com> Signed-off-by:
Ray Jui <rjui@broadcom.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- 25 Aug, 2014 2 commits
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Tim Chen authored
This patch introduces the routines used to submit and flush buffers belonging to SHA1 crypto jobs to the SHA1 multibuffer algorithm. It is implemented mostly in assembly optimized with AVX2 instructions. Signed-off-by:
Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Tim Chen authored
This patch introduces the data structures and prototypes of functions needed for computing SHA1 hash using multi-buffer. Included are the structures of the multi-buffer SHA1 job, job scheduler in C and x86 assembly. Signed-off-by:
Tim Chen <tim.c.chen@linux.intel.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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