Commit 1c647d87 authored by Angus Ainslie's avatar Angus Ainslie
Browse files

freescale/pinctrl : this is the memmapped version of the pinctl

parent a4d0e100
config PINCTRL_IMX
bool
select GENERIC_PINCTRL_GROUPS
select GENERIC_PINMUX_FUNCTIONS
select GENERIC_PINCONF
select PINMUX
select PINCONF
select REGMAP
config PINCTRL_IMX_SCU
bool
config PINCTRL_IMX_MEMMAP
bool
config PINCTRL_IMX1_CORE
bool
select PINMUX
......@@ -37,6 +42,7 @@ config PINCTRL_IMX25
depends on OF
depends on SOC_IMX25
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx25 pinctrl driver
......@@ -44,6 +50,7 @@ config PINCTRL_IMX35
bool "IMX35 pinctrl driver"
depends on SOC_IMX35
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx35 pinctrl driver
......@@ -51,6 +58,7 @@ config PINCTRL_IMX50
bool "IMX50 pinctrl driver"
depends on SOC_IMX50
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx50 pinctrl driver
......@@ -58,6 +66,7 @@ config PINCTRL_IMX51
bool "IMX51 pinctrl driver"
depends on SOC_IMX51
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx51 pinctrl driver
......@@ -65,6 +74,7 @@ config PINCTRL_IMX53
bool "IMX53 pinctrl driver"
depends on SOC_IMX53
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx53 pinctrl driver
......@@ -72,6 +82,7 @@ config PINCTRL_IMX6Q
bool "IMX6Q/DL pinctrl driver"
depends on SOC_IMX6Q
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx6q/dl pinctrl driver
......@@ -79,20 +90,15 @@ config PINCTRL_IMX6SL
bool "IMX6SL pinctrl driver"
depends on SOC_IMX6SL
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx6sl pinctrl driver
config PINCTRL_IMX6SLL
bool "IMX6SLL pinctrl driver"
depends on SOC_IMX6SLL
select PINCTRL_IMX
help
Say Y here to enable the imx6sll pinctrl driver
config PINCTRL_IMX6SX
bool "IMX6SX pinctrl driver"
depends on SOC_IMX6SX
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx6sx pinctrl driver
......@@ -100,13 +106,23 @@ config PINCTRL_IMX6UL
bool "IMX6UL pinctrl driver"
depends on SOC_IMX6UL
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx6ul pinctrl driver
config PINCTRL_IMX6SLL
bool "IMX6SLL pinctrl driver"
depends on SOC_IMX6SLL
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx6sll pinctrl driver
config PINCTRL_IMX7D
bool "IMX7D pinctrl driver"
depends on SOC_IMX7D
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx7d pinctrl driver
......@@ -114,13 +130,31 @@ config PINCTRL_IMX7ULP
bool "IMX7ULP pinctrl driver"
depends on SOC_IMX7ULP
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx7ulp pinctrl driver
config PINCTRL_IMX8QM
bool "IMX8QM pinctrl driver"
depends on ARCH_FSL_IMX8QM
select PINCTRL_IMX
select PINCTRL_IMX_SCU
help
Say Y here to enable the imx8qm pinctrl driver
config PINCTRL_IMX8QXP
bool "IMX8QXP pinctrl driver"
depends on ARCH_FSL_IMX8QXP
select PINCTRL_IMX
select PINCTRL_IMX_SCU
help
Say Y here to enable the imx8qxp pinctrl driver
config PINCTRL_IMX8MQ
bool "IMX8MQ pinctrl driver"
depends on SOC_IMX8MQ
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the imx8mq pinctrl driver
......@@ -128,6 +162,7 @@ config PINCTRL_VF610
bool "Freescale Vybrid VF610 pinctrl driver"
depends on SOC_VF610
select PINCTRL_IMX
select PINCTRL_IMX_MEMMAP
help
Say Y here to enable the Freescale Vybrid VF610 pinctrl driver
......
# SPDX-License-Identifier: GPL-2.0
# Freescale pin control drivers
obj-$(CONFIG_PINCTRL_IMX) += pinctrl-imx.o
obj-$(CONFIG_PINCTRL_IMX_MEMMAP)+= pinctrl-memmap.o
obj-$(CONFIG_PINCTRL_IMX_SCU) += pinctrl-scu.o
obj-$(CONFIG_PINCTRL_IMX1_CORE) += pinctrl-imx1-core.o
obj-$(CONFIG_PINCTRL_IMX1) += pinctrl-imx1.o
obj-$(CONFIG_PINCTRL_IMX21) += pinctrl-imx21.o
......@@ -12,11 +13,13 @@ obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o
obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o
obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o
obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o
obj-$(CONFIG_PINCTRL_IMX6SLL) += pinctrl-imx6sll.o
obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o
obj-$(CONFIG_PINCTRL_IMX6UL) += pinctrl-imx6ul.o
obj-$(CONFIG_PINCTRL_IMX6SLL) += pinctrl-imx6sll.o
obj-$(CONFIG_PINCTRL_IMX7D) += pinctrl-imx7d.o
obj-$(CONFIG_PINCTRL_IMX7ULP) += pinctrl-imx7ulp.o
obj-$(CONFIG_PINCTRL_IMX8QM) += pinctrl-imx8qm.o
obj-$(CONFIG_PINCTRL_IMX8QXP) += pinctrl-imx8qxp.o
obj-$(CONFIG_PINCTRL_IMX8MQ) += pinctrl-imx8mq.o
obj-$(CONFIG_PINCTRL_VF610) += pinctrl-vf610.o
obj-$(CONFIG_PINCTRL_MXS) += pinctrl-mxs.o
......
This diff is collapsed.
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* IMX pinmux core definitions
*
* Copyright (C) 2012 Freescale Semiconductor, Inc.
* Copyright (C) 2012 Linaro Ltd.
* Copyright 2017 NXP
*
* Author: Dong Aisheng <dong.aisheng@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __DRIVERS_PINCTRL_IMX_H
#define __DRIVERS_PINCTRL_IMX_H
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinmux.h>
/* The bits in CONFIG cell defined in binding doc*/
#define IMX_NO_PAD_CTL 0x80000000 /* no pin config need */
#define IMX_PAD_SION 0x40000000 /* set SION */
struct platform_device;
extern struct pinmux_ops imx_pmx_ops;
/**
* struct imx_pin - describes a single i.MX pin
* struct imx_pin_group - describes a single i.MX pin
* @pin: the pin_id of this pin
* @mux_mode: the mux mode for this pin.
* @input_reg: the select input register offset for this pin if any
......@@ -31,14 +27,53 @@ extern struct pinmux_ops imx_pmx_ops;
* @input_val: the select input value for this pin.
* @configs: the config for this pin.
*/
struct imx_pin {
unsigned int pin;
struct imx_pin_memmap {
unsigned int mux_mode;
u16 input_reg;
unsigned int input_val;
unsigned long config;
};
struct imx_pin_scu {
unsigned long mux;
unsigned long config;
};
struct imx_pin {
unsigned int pin;
union {
struct imx_pin_memmap pin_memmap;
struct imx_pin_scu pin_scu;
} pin_conf;
};
/**
* struct imx_pin_group - describes an IMX pin group
* @name: the name of this specific pin group
* @npins: the number of pins in this group array, i.e. the number of
* elements in .pins so we can iterate over that array
* @pin_ids: array of pin_ids. pinctrl forces us to maintain such an array
* @pins: array of pins
*/
struct imx_pin_group {
const char *name;
unsigned npins;
unsigned int *pin_ids;
struct imx_pin *pins;
};
/**
* struct imx_pmx_func - describes IMX pinmux functions
* @name: the name of this specific function
* @groups: corresponding pin groups
* @num_groups: the number of groups
*/
struct imx_pmx_func {
const char *name;
const char **groups;
unsigned num_groups;
};
/**
* struct imx_pin_reg - describe a pin reg map
* @mux_reg: mux register offset
......@@ -49,37 +84,19 @@ struct imx_pin_reg {
s16 conf_reg;
};
/* decode a generic config into raw register value */
struct imx_cfg_params_decode {
enum pin_config_param param;
u32 mask;
u8 shift;
bool invert;
};
struct imx_pinctrl_soc_info {
struct device *dev;
const struct pinctrl_pin_desc *pins;
unsigned int npins;
struct imx_pin_reg *pin_regs;
struct imx_pin_group *groups;
unsigned int ngroups;
unsigned int group_index;
struct imx_pmx_func *functions;
unsigned int nfunctions;
unsigned int flags;
const char *gpr_compatible;
/* MUX_MODE shift and mask in case SHARE_MUX_CONF_REG */
unsigned int mux_mask;
u8 mux_shift;
/* generic pinconf */
bool generic_pinconf;
const struct pinconf_generic_params *custom_params;
unsigned int num_custom_params;
const struct imx_cfg_params_decode *decodes;
unsigned int num_decodes;
void (*fixup)(unsigned long *configs, unsigned int num_configs,
u32 *raw_config);
int (*gpio_set_direction)(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned offset,
bool input);
};
/**
......@@ -92,19 +109,17 @@ struct imx_pinctrl {
void __iomem *base;
void __iomem *input_sel_base;
const struct imx_pinctrl_soc_info *info;
struct imx_pin_reg *pin_regs;
unsigned int group_index;
struct mutex mutex;
};
#define IMX_CFG_PARAMS_DECODE(p, m, o) \
{ .param = p, .mask = m, .shift = o, .invert = false, }
#define IMX_CFG_PARAMS_DECODE_INVERT(p, m, o) \
{ .param = p, .mask = m, .shift = o, .invert = true, }
#define SHARE_MUX_CONF_REG 0x1
#define ZERO_OFFSET_VALID 0x2
#define CONFIG_IBE_OBE 0x4
#define IMX8_ENABLE_MUX_CONFIG (1 << 29)
#define IMX8_ENABLE_PAD_CONFIG (1 << 30)
#define IMX8_USE_SCU (1 << 31)
#define BM_IMX8_GP_ENABLE (1 << 30)
#define BM_IMX8_IFMUX_ENABLE (1 << 31)
#define NO_MUX 0x0
#define NO_PAD 0x0
......@@ -116,5 +131,109 @@ struct imx_pinctrl {
#define IOMUXC_CONFIG_SION (0x1 << 4)
int imx_pinctrl_probe(struct platform_device *pdev,
const struct imx_pinctrl_soc_info *info);
struct imx_pinctrl_soc_info *info);
int imx_pinctrl_suspend(struct device *dev);
int imx_pinctrl_resume(struct device *dev);
#ifdef CONFIG_PINCTRL_IMX_MEMMAP
int imx_pmx_set_one_pin_mem(struct imx_pinctrl *ipctl, struct imx_pin *pin);
int imx_pmx_backend_gpio_request_enable_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset);
void imx_pmx_backend_gpio_disable_free_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset);
int imx_pmx_backend_gpio_set_direction_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset, bool input);
int imx_pinconf_backend_get_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config);
int imx_pinconf_backend_set_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs);
int imx_pinctrl_parse_pin_mem(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p);
#else
static inline int imx_pmx_set_one_pin_mem(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
return 0;
}
static inline int imx_pmx_backend_gpio_request_enable_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset)
{
return 0;
}
static inline void imx_pmx_backend_gpio_disable_free_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset)
{
return;
}
static inline int imx_pmx_backend_gpio_set_direction_mem(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset, bool input)
{
return 0;
}
static inline int imx_pinconf_backend_get_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config)
{
return 0;
}
static inline int imx_pinconf_backend_set_mem(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs)
{
return 0;
}
static inline int imx_pinctrl_parse_pin_mem(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p)
{
return 0;
}
#endif
#ifdef CONFIG_PINCTRL_IMX_SCU
int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin);
int imx_pmx_backend_gpio_request_enable_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset);
void imx_pmx_backend_gpio_disable_free_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset);
int imx_pmx_backend_gpio_set_direction_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset, bool input);
int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config);
int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs);
int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p);
#else
static inline int imx_pmx_set_one_pin_scu(struct imx_pinctrl *ipctl, struct imx_pin *pin)
{
return 0;
}
static inline int imx_pmx_backend_gpio_request_enable_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset)
{
return 0;
}
static inline void imx_pmx_backend_gpio_disable_free_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset)
{
return;
}
static inline int imx_pmx_backend_gpio_set_direction_scu(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range, unsigned offset, bool input)
{
return 0;
}
static inline int imx_pinconf_backend_get_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *config)
{
return 0;
}
static inline int imx_pinconf_backend_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned long *configs, unsigned num_configs)
{
return 0;
}
static inline int imx_pinctrl_parse_pin_scu(struct imx_pinctrl_soc_info *info,
unsigned int *pin_id, struct imx_pin *pin, const __be32 **list_p)
{
return 0;
}
#endif
#endif /* __DRIVERS_PINCTRL_IMX_H */
// SPDX-License-Identifier: GPL-2.0+
//
// Core driver for the imx pin controller in imx1/21/27
//
// Copyright (C) 2013 Pengutronix
// Author: Markus Pargmann <mpa@pengutronix.de>
//
// Based on pinctrl-imx.c:
// Author: Dong Aisheng <dong.aisheng@linaro.org>
// Copyright (C) 2012 Freescale Semiconductor, Inc.
// Copyright (C) 2012 Linaro Ltd.
/*
* Core driver for the imx pin controller in imx1/21/27
*
* Copyright (C) 2013 Pengutronix
* Author: Markus Pargmann <mpa@pengutronix.de>
*
* Based on pinctrl-imx.c:
* Author: Dong Aisheng <dong.aisheng@linaro.org>
* Copyright (C) 2012 Freescale Semiconductor, Inc.
* Copyright (C) 2012 Linaro Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/bitops.h>
#include <linux/err.h>
......@@ -241,8 +246,7 @@ static int imx1_dt_node_to_map(struct pinctrl_dev *pctldev,
for (i = 0; i < grp->npins; i++)
map_num++;
new_map = kmalloc_array(map_num, sizeof(struct pinctrl_map),
GFP_KERNEL);
new_map = kmalloc(sizeof(struct pinctrl_map) * map_num, GFP_KERNEL);
if (!new_map)
return -ENOMEM;
......@@ -483,10 +487,10 @@ static int imx1_pinctrl_parse_groups(struct device_node *np,
}
grp->npins = size / 12;
grp->pins = devm_kcalloc(info->dev,
grp->npins, sizeof(struct imx1_pin), GFP_KERNEL);
grp->pin_ids = devm_kcalloc(info->dev,
grp->npins, sizeof(unsigned int), GFP_KERNEL);
grp->pins = devm_kzalloc(info->dev,
grp->npins * sizeof(struct imx1_pin), GFP_KERNEL);
grp->pin_ids = devm_kzalloc(info->dev,
grp->npins * sizeof(unsigned int), GFP_KERNEL);
if (!grp->pins || !grp->pin_ids)
return -ENOMEM;
......@@ -523,8 +527,8 @@ static int imx1_pinctrl_parse_functions(struct device_node *np,
if (func->num_groups == 0)
return -EINVAL;
func->groups = devm_kcalloc(info->dev,
func->num_groups, sizeof(char *), GFP_KERNEL);
func->groups = devm_kzalloc(info->dev,
func->num_groups * sizeof(char *), GFP_KERNEL);
if (!func->groups)
return -ENOMEM;
......@@ -566,12 +570,12 @@ static int imx1_pinctrl_parse_dt(struct platform_device *pdev,
}
info->nfunctions = nfuncs;
info->functions = devm_kcalloc(&pdev->dev,
nfuncs, sizeof(struct imx1_pmx_func), GFP_KERNEL);
info->functions = devm_kzalloc(&pdev->dev,
nfuncs * sizeof(struct imx1_pmx_func), GFP_KERNEL);
info->ngroups = ngroups;
info->groups = devm_kcalloc(&pdev->dev,
ngroups, sizeof(struct imx1_pin_group), GFP_KERNEL);
info->groups = devm_kzalloc(&pdev->dev,
ngroups * sizeof(struct imx1_pin_group), GFP_KERNEL);
if (!info->functions || !info->groups)
......
// SPDX-License-Identifier: GPL-2.0+
//
// i.MX1 pinctrl driver based on imx pinmux core
//
// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
/*
* i.MX1 pinctrl driver based on imx pinmux core
*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/init.h>
#include <linux/of.h>
......
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* IMX pinmux core definitions
*
......@@ -6,6 +5,11 @@
* Copyright (C) 2012 Linaro Ltd.
*
* Author: Dong Aisheng <dong.aisheng@linaro.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __DRIVERS_PINCTRL_IMX1_H
......
// SPDX-License-Identifier: GPL-2.0+
//
// i.MX21 pinctrl driver based on imx pinmux core
//
// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
/*
* i.MX21 pinctrl driver based on imx pinmux core
*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/init.h>
#include <linux/of.h>
......
// SPDX-License-Identifier: GPL-2.0+
//
// Freescale i.MX23 pinctrl driver
//
// Author: Shawn Guo <shawn.guo@linaro.org>
// Copyright 2012 Freescale Semiconductor, Inc.
/*
* Freescale i.MX23 pinctrl driver
*
* Author: Shawn Guo <shawn.guo@linaro.org>
* Copyright 2012 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/init.h>
#include <linux/of_device.h>
......@@ -250,7 +257,7 @@ static const struct pinctrl_pin_desc imx23_pins[] = {
MXS_PINCTRL_PIN(EMI_CLKN),
};
static const struct mxs_regs imx23_regs = {
static struct mxs_regs imx23_regs = {
.muxsel = 0x100,