• David Gibson's avatar
    [POWERPC] Fix small race in 44x tlbie function · aa1cf632
    David Gibson authored
    The 440 family of processors don't have a tlbie instruction.  So, we
    implement TLB invalidates by explicitly searching the TLB with tlbsx.,
    then clobbering the relevant entry, if any.  Unfortunately the PID for
    the search needs to be stored in the MMUCR register, which is also
    used by the TLB miss handler.  Interrupts were enabled in _tlbie(), so
    an interrupt between loading the MMUCR and the tlbsx could cause
    incorrect search results, and thus a failure to invalide TLB entries
    which needed to be invalidated.
    This fixes the problem in both arch/ppc and arch/powerpc by inhibiting
    interrupts (even critical and debug interrupts) across the relevant
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    Acked-by: default avatarJosh Boyer <jwboyer@linux.vnet.ibm.com>
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
misc.S 17.2 KB