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Andi Kleen authored
This is a modified version of an earlier patch by Andi Kleen. We expect architectures to create JSON files describing the performance monitoring (PMU) events that each CPU model/family of the architecture supports. Following is an example of the JSON file entry for an x86 event: [ ... { "EventCode": "0x00", "UMask": "0x01", "EventName": "INST_RETIRED.ANY", "BriefDescription": "Instructions retired from execution.", "PublicDescription": "Instructions retired from execution.", "Counter": "Fixed counter 1", "CounterHTOff": "Fixed counter 1", "SampleAfterValue": "2000003", "SampleAfterValue": "2000003", "MSRIndex": "0", "MSRValue": "0", "TakenAlone": "0", "CounterMask": "0", "Invert": "0", "AnyThread": "0", "EdgeDetect": "0", "PEBS": "0", "PRECISE_STORE": "0", "Errata": "null", "Offcore": "0" }, ... ] All the PMU events supported by a CPU model/family must be grouped into "topics" such as "Pipelining", "Floating-point", "Virtual-memory" etc. All events belonging to a topic must be placed in a separate JSON file (eg: "Pipelining.json") and all the topic JSON files for a CPU model must be in a separate directory. Eg: for the CPU model "Silvermont_core": $ ls tools/perf/pmu-events/arch/x86/Silvermont_core Floating-point.json Memory.json Other.json Pipelining.json Virtualmemory.json Finally, to allow multiple CPU models to share a single set of JSON files, architectures must provide a mapping between a model and its set of events: $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv GenuineIntel-6-4D,V13,Silvermont_core,core GenuineIntel-6-4C,V13,Silvermont_core,core which maps each CPU, identified by [vendor, family, model, version, type] to a directory of JSON files. Thus two (or more) CPU models support the set of PMU events listed in the directory. tools/perf/pmu-events/arch/x86/Silvermont_core/ Given this organization of files, the program, jevents: - locates all JSON files for each CPU-model of the architecture, - parses all JSON files for the CPU-model and generates a C-style "PMU-events table" (pmu-events.c) for the model - locates a mapfile for the architecture - builds a global table, mapping each model of CPU to the corresponding PMU-events table. The 'pmu-events.c' is generated when building perf and added to libperf.a. The global table pmu_events_map[] table in this pmu-events.c will be used in perf in a follow-on patch. If the architecture does not have any JSON files or there is an error in processing them, an empty mapping file is created. This would allow the build of perf to proceed even if we are not able to provide aliases for events. The parser for JSON files allows parsing Intel style JSON event files. This allows to use an Intel event list directly with perf. The Intel event lists can be quite large and are too big to store in unswappable kernel memory. The conversion from JSON to C-style is straight forward. The parser knows (very little) Intel specific information, and can be easily extended to handle fields for other CPUs. The parser code is partially shared with an independent parsing library, which is 2-clause BSD licensed. To avoid any conflicts I marked those files as BSD licensed too. As part of perf they become GPLv2. Committer notes: Fixes: 1) Limit maxfds to 512 to avoid nftd() segfaulting on alloca() with a big rlim_max, as in docker containers - acme 2) Make jevents a hostprog, supporting cross compilation - jolsa 3) Use HOSTCC for jevents final step - acme 4) Define _GNU_SOURCE for asprintf, as we can't use CC's EXTRA_CFLAGS, that has to have --sysroot on the Android NDK 24 - acme 5) Removed $(srctree)/tools/perf/pmu-events/pmu-events.c from the 'clean' target, it is generated on $(OUTPUT)pmu-events/pmu-events.c, which is already taken care of in the original patch - acme Signed-off-by:Andi Kleen <ak@linux.intel.com> Signed-off-by:
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