Commit 18a9d748 authored by Sjoerd Simons's avatar Sjoerd Simons Committed by Mark Brown

ASoC: rockchip: Fix incorrect VDW value for 24 bit

Correct valid data word register value for 24 bit data width. The
bit value should be 10 (aka 0x2), not 0x10.

This fixes playback of 24 bit audio.
Signed-off-by: default avatarSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 0e18d457
......@@ -28,9 +28,9 @@
#define SPDIF_CFGR_VDW(x) (x << SPDIF_CFGR_VDW_SHIFT)
#define SDPIF_CFGR_VDW_MASK (0xf << SPDIF_CFGR_VDW_SHIFT)
#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x00)
#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x01)
#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x10)
#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x0)
#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x1)
#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x2)
/*
* DMACR
......
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