sound/soc/fsl : forward port the fsl imx sound drivers

parent 49db77cb
......@@ -86,6 +86,14 @@ struct snd_dmaengine_dai_dma_data {
unsigned int flags;
};
struct dmaengine_pcm_runtime_data {
struct dma_chan *dma_chan;
dma_cookie_t cookie;
unsigned int pos;
// dma_async_tx_callback callback;
};
void snd_dmaengine_pcm_set_config_from_dai_data(
const struct snd_pcm_substream *substream,
const struct snd_dmaengine_dai_dma_data *dma_data,
......
......@@ -28,13 +28,6 @@
#include <sound/dmaengine_pcm.h>
struct dmaengine_pcm_runtime_data {
struct dma_chan *dma_chan;
dma_cookie_t cookie;
unsigned int pos;
};
static inline struct dmaengine_pcm_runtime_data *substream_to_prtd(
const struct snd_pcm_substream *substream)
{
......
This diff is collapsed.
# SPDX-License-Identifier: GPL-2.0
# MPC8610 HPCD Machine Support
snd-soc-mpc8610-hpcd-objs := mpc8610_hpcd.o
obj-$(CONFIG_SND_SOC_MPC8610_HPCD) += snd-soc-mpc8610-hpcd.o
......@@ -12,23 +11,34 @@ snd-soc-p1022-rdk-objs := p1022_rdk.o
obj-$(CONFIG_SND_SOC_P1022_RDK) += snd-soc-p1022-rdk.o
# Freescale SSI/DMA/SAI/SPDIF Support
snd-soc-fsl-asoc-card-objs := fsl-asoc-card.o
snd-soc-fsl-acm-objs := fsl_acm.o
snd-soc-fsl-amix-objs := fsl_amix.o
snd-soc-fsl-asrc-objs := fsl_asrc.o fsl_asrc_dma.o
snd-soc-fsl-dma-workaround-objs := fsl_dma_workaround.o
snd-soc-fsl-hifi4-objs := fsl_hifi4.o
snd-soc-fsl-sai-objs := fsl_sai.o
snd-soc-fsl-ssi-y := fsl_ssi.o
snd-soc-fsl-ssi-$(CONFIG_DEBUG_FS) += fsl_ssi_dbg.o
snd-soc-fsl-spdif-objs := fsl_spdif.o
snd-soc-fsl-esai-objs := fsl_esai.o
snd-soc-fsl-esai-objs := fsl_esai.o fsl_dma_workaround.o
snd-soc-fsl-utils-objs := fsl_utils.o
snd-soc-fsl-dma-objs := fsl_dma.o
obj-$(CONFIG_SND_SOC_FSL_ASOC_CARD) += snd-soc-fsl-asoc-card.o
snd-soc-fsl-rpmsg-i2s-objs := fsl_rpmsg_i2s.o
snd-soc-fsl-hdmi-objs := fsl_hdmi.o
snd-soc-fsl-asoc-card-objs := fsl-asoc-card.o
obj-$(CONFIG_SND_SOC_FSL_ACM) += snd-soc-fsl-acm.o
obj-$(CONFIG_SND_SOC_FSL_AMIX) += snd-soc-fsl-amix.o
obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc.o
obj-$(CONFIG_SND_SOC_FSL_HIFI4) += snd-soc-fsl-hifi4.o
obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o
obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
#obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
#obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
obj-$(CONFIG_SND_SOC_FSL_ESAI) += snd-soc-fsl-esai.o
obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o
obj-$(CONFIG_SND_SOC_FSL_HDMI) += snd-soc-fsl-hdmi.o
obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o
obj-$(CONFIG_SND_SOC_FSL_RPMSG_I2S) += snd-soc-fsl-rpmsg-i2s.o
obj-$(CONFIG_SND_SOC_FSL_ASOC_CARD) += snd-soc-fsl-asoc-card.o
# MPC5200 Platform Support
obj-$(CONFIG_SND_MPC52xx_DMA) += mpc5200_dma.o
......@@ -46,7 +56,9 @@ obj-$(CONFIG_SND_SOC_IMX_SSI) += snd-soc-imx-ssi.o
obj-$(CONFIG_SND_SOC_IMX_AUDMUX) += snd-soc-imx-audmux.o
obj-$(CONFIG_SND_SOC_IMX_PCM_FIQ) += imx-pcm-fiq.o
obj-$(CONFIG_SND_SOC_IMX_PCM_DMA) += imx-pcm-dma.o
obj-$(CONFIG_SND_SOC_IMX_PCM_DMA) += imx-pcm-dma.o imx-pcm-dma-v2.o
obj-$(CONFIG_SND_SOC_IMX_PCM_RPMSG) += imx-pcm-rpmsg.o
obj-$(CONFIG_SND_SOC_IMX_HDMI_DMA) += imx-hdmi-dma.o hdmi_pcm.o
# i.MX Machine Support
snd-soc-eukrea-tlv320-objs := eukrea-tlv320.o
......@@ -54,15 +66,51 @@ snd-soc-phycore-ac97-objs := phycore-ac97.o
snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
snd-soc-wm1133-ev1-objs := wm1133-ev1.o
snd-soc-imx-es8328-objs := imx-es8328.o
snd-soc-imx-cs42888-objs := imx-cs42888.o
snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
snd-soc-imx-spdif-objs := imx-spdif.o
snd-soc-imx-wm8958-objs := imx-wm8958.o
snd-soc-imx-wm8960-objs := imx-wm8960.o
snd-soc-imx-wm8524-objs := imx-wm8524.o
snd-soc-imx-wm8962-objs := imx-wm8962.o
snd-soc-imx-xtor-objs := imx-xtor.o
snd-soc-imx-sii902x-objs := imx-sii902x.o
#snd-soc-imx-spdif-objs := imx-spdif.o
snd-soc-imx-mc13783-objs := imx-mc13783.o
snd-soc-imx-mqs-objs := imx-mqs.o
snd-soc-imx-si476x-objs := imx-si476x.o
snd-soc-imx-hdmi-objs := imx-hdmi.o
snd-soc-imx-cdnhdmi-objs := imx-cdnhdmi.o
snd-soc-imx-rpmsg-objs := imx-rpmsg.o
snd-soc-imx-amix-objs := imx-amix.o
snd-soc-imx-pdm-objs := imx-pdm.o
snd-soc-imx-ak4458-objs := imx-ak4458.o
snd-soc-imx-ak5558-objs := imx-ak5558.o
snd-soc-imx-ak4497-objs := imx-ak4497.o
obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
obj-$(CONFIG_SND_SOC_IMX_ES8328) += snd-soc-imx-es8328.o
obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o
obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
obj-${CONFIG_SND_SOC_IMX_WM8958} += snd-soc-imx-wm8958.o
obj-$(CONFIG_SND_SOC_IMX_WM8960) += snd-soc-imx-wm8960.o
obj-$(CONFIG_SND_SOC_IMX_WM8524) += snd-soc-imx-wm8524.o
obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
obj-$(CONFIG_SND_SOC_IMX_XTOR) += snd-soc-imx-xtor.o
obj-$(CONFIG_SND_SOC_IMX_RPMSG) += snd-soc-imx-rpmsg.o
obj-$(CONFIG_SND_SOC_IMX_SII902X) += snd-soc-imx-sii902x.o
obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o
obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o
obj-$(CONFIG_SND_SOC_IMX_MQS) += snd-soc-imx-mqs.o
obj-$(CONFIG_SND_SOC_IMX_SI476X) += snd-soc-imx-si476x.o
obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o
obj-$(CONFIG_SND_SOC_IMX_AMIX) += snd-soc-imx-amix.o
obj-$(CONFIG_SND_SOC_IMX_CDNHDMI) += snd-soc-imx-cdnhdmi.o
obj-$(CONFIG_SND_SOC_IMX_PDM_MIC) += snd-soc-imx-pdm.o
obj-$(CONFIG_SND_SOC_IMX_AK4458) += snd-soc-imx-ak4458.o
obj-$(CONFIG_SND_SOC_IMX_AK5558) += snd-soc-imx-ak5558.o
obj-$(CONFIG_SND_SOC_IMX_AK4497) += snd-soc-imx-ak4497.o
AFLAGS_hdmi_pcm.o := -march=armv7-a -mtune=cortex-a9 -mfpu=neon -mfloat-abi=softfp
......@@ -26,6 +26,8 @@
#include <sound/soc.h>
#include "mpc5200_dma.h"
#include "mpc5200_psc_ac97.h"
#include "../codecs/stac9766.h"
#define DRV_NAME "efika-audio-fabric"
......
......@@ -29,6 +29,7 @@
#include "../codecs/tlv320aic23.h"
#include "imx-ssi.h"
#include "fsl_ssi.h"
#include "imx-audmux.h"
#define CODEC_CLOCK 12000000
......@@ -63,7 +64,7 @@ static int eukrea_tlv320_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static const struct snd_soc_ops eukrea_tlv320_snd_ops = {
static struct snd_soc_ops eukrea_tlv320_snd_ops = {
.hw_params = eukrea_tlv320_hw_params,
};
......
......@@ -27,6 +27,7 @@
#include "../codecs/sgtl5000.h"
#include "../codecs/wm8962.h"
#include "../codecs/wm8960.h"
#include "../codecs/wm8985.h"
#define CS427x_SYSCLK_MCLK 0
......@@ -49,6 +50,7 @@ struct codec_priv {
u32 mclk_id;
u32 fll_id;
u32 pll_id;
int *lrclk_divs;
};
/**
......@@ -91,9 +93,9 @@ struct fsl_asoc_card_priv {
struct cpu_priv cpu_priv;
struct snd_soc_card card;
u32 sample_rate;
snd_pcm_format_t sample_format;
u32 sample_format;
u32 asrc_rate;
snd_pcm_format_t asrc_format;
u32 asrc_format;
u32 dai_fmt;
char name[32];
};
......@@ -139,6 +141,8 @@ static bool fsl_asoc_card_is_ac97(struct fsl_asoc_card_priv *priv)
return priv->dai_fmt == SND_SOC_DAIFMT_AC97;
}
static u32 wm8985_lrc_divs[] = { 128, 192, 256, 384, 512, 768, 1024, 1536, 0 };
static int fsl_asoc_card_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params)
{
......@@ -166,7 +170,7 @@ static int fsl_asoc_card_hw_params(struct snd_pcm_substream *substream,
ret = snd_soc_dai_set_sysclk(rtd->cpu_dai, cpu_priv->sysclk_id[tx],
cpu_priv->sysclk_freq[tx],
cpu_priv->sysclk_dir[tx]);
if (ret && ret != -ENOTSUPP) {
if (ret) {
dev_err(dev, "failed to set sysclk for cpu dai\n");
return ret;
}
......@@ -174,7 +178,7 @@ static int fsl_asoc_card_hw_params(struct snd_pcm_substream *substream,
if (cpu_priv->slot_width) {
ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2,
cpu_priv->slot_width);
if (ret && ret != -ENOTSUPP) {
if (ret) {
dev_err(dev, "failed to set TDM slot for cpu dai\n");
return ret;
}
......@@ -183,7 +187,7 @@ static int fsl_asoc_card_hw_params(struct snd_pcm_substream *substream,
return 0;
}
static const struct snd_soc_ops fsl_asoc_card_ops = {
static struct snd_soc_ops fsl_asoc_card_ops = {
.hw_params = fsl_asoc_card_hw_params,
};
......@@ -199,7 +203,7 @@ static int be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
mask = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
snd_mask_none(mask);
snd_mask_set(mask, (__force int)priv->asrc_format);
snd_mask_set(mask, priv->asrc_format);
return 0;
}
......@@ -243,7 +247,8 @@ static int fsl_asoc_card_set_bias_level(struct snd_soc_card *card,
struct codec_priv *codec_priv = &priv->codec_priv;
struct device *dev = card->dev;
unsigned int pll_out;
int ret;
int ret = 0;
int i;
rtd = snd_soc_get_pcm_runtime(card, card->dai_link[0].name);
codec_dai = rtd->codec_dai;
......@@ -255,14 +260,29 @@ static int fsl_asoc_card_set_bias_level(struct snd_soc_card *card,
if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
break;
if (priv->sample_format == SNDRV_PCM_FORMAT_S24_LE)
pll_out = priv->sample_rate * 384;
else
pll_out = priv->sample_rate * 256;
if (codec_priv->lrclk_divs != NULL) {
for (i = 0; codec_priv->lrclk_divs[i] != 0; i ++) {
pll_out = priv->sample_rate * codec_priv->lrclk_divs[i];
ret = snd_soc_dai_set_pll(codec_dai, codec_priv->pll_id,
codec_priv->mclk_id,
codec_priv->mclk_freq, pll_out);
if (ret == 0) {
break;
}
}
} else {
if (priv->sample_format == SNDRV_PCM_FORMAT_S24_LE) {
pll_out = priv->sample_rate * 384;
} else {
pll_out = priv->sample_rate * 256;
}
ret = snd_soc_dai_set_pll(codec_dai, codec_priv->pll_id,
codec_priv->mclk_id,
codec_priv->mclk_freq, pll_out);
}
ret = snd_soc_dai_set_pll(codec_dai, codec_priv->pll_id,
codec_priv->mclk_id,
codec_priv->mclk_freq, pll_out);
if (ret) {
dev_err(dev, "failed to start FLL: %d\n", ret);
return ret;
......@@ -270,7 +290,7 @@ static int fsl_asoc_card_set_bias_level(struct snd_soc_card *card,
ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->fll_id,
pll_out, SND_SOC_CLOCK_IN);
if (ret && ret != -ENOTSUPP) {
if (ret) {
dev_err(dev, "failed to set SYSCLK: %d\n", ret);
return ret;
}
......@@ -283,7 +303,7 @@ static int fsl_asoc_card_set_bias_level(struct snd_soc_card *card,
ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->mclk_id,
codec_priv->mclk_freq,
SND_SOC_CLOCK_IN);
if (ret && ret != -ENOTSUPP) {
if (ret) {
dev_err(dev, "failed to switch away from FLL: %d\n", ret);
return ret;
}
......@@ -442,8 +462,8 @@ static int fsl_asoc_card_late_probe(struct snd_soc_card *card)
if (fsl_asoc_card_is_ac97(priv)) {
#if IS_ENABLED(CONFIG_SND_AC97_CODEC)
struct snd_soc_component *component = rtd->codec_dai->component;
struct snd_ac97 *ac97 = snd_soc_component_get_drvdata(component);
struct snd_soc_codec *codec = rtd->codec;
struct snd_ac97 *ac97 = snd_soc_codec_get_drvdata(codec);
/*
* Use slots 3/4 for S/PDIF so SSI won't try to enable
......@@ -459,7 +479,7 @@ static int fsl_asoc_card_late_probe(struct snd_soc_card *card)
ret = snd_soc_dai_set_sysclk(codec_dai, codec_priv->mclk_id,
codec_priv->mclk_freq, SND_SOC_CLOCK_IN);
if (ret && ret != -ENOTSUPP) {
if (ret) {
dev_err(dev, "failed to set sysclk in %s\n", __func__);
return ret;
}
......@@ -562,6 +582,24 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
codec_dai_name = "ac97-hifi";
priv->card.set_bias_level = NULL;
priv->dai_fmt = SND_SOC_DAIFMT_AC97;
} else if (of_device_is_compatible(np, "fsl,imx-audio-wm8985")) {
/* wm8985 codec can generate bclk and lrclk in such a way
that the bclk/lrclk ratio is always a power of 2.
Use DSP_A base format since FSL SAI
doesn't propelry generate data in I2S format when
bclk/lrclk is not equal to the frame size, that happends
when frame size is not a power of 2 in case of wm8985 codec.
*/
codec_dai_name = "wm8985";
if (strstr(cpu_np->name, "sai"))
priv->dai_fmt =
(SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_NB_NF);
priv->card.set_bias_level = fsl_asoc_card_set_bias_level;
priv->codec_priv.mclk_id = WM8985_CLKSRC_MCLK;
priv->codec_priv.fll_id = WM8985_CLKSRC_PLL;
priv->codec_priv.pll_id = WM8985_CLKSRC_PLL;
priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
priv->codec_priv.lrclk_divs = wm8985_lrc_divs;
} else {
dev_err(&pdev->dev, "unknown Device Tree compatible\n");
ret = -EINVAL;
......@@ -599,12 +637,14 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
priv->card.dev = &pdev->dev;
priv->card.name = priv->name;
priv->card.dai_link = priv->dai_link;
priv->card.dapm_routes = fsl_asoc_card_is_ac97(priv) ?
audio_map_ac97 : audio_map;
priv->card.late_probe = fsl_asoc_card_late_probe;
priv->card.num_dapm_routes = ARRAY_SIZE(audio_map);
priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets;
priv->card.num_dapm_widgets = ARRAY_SIZE(fsl_asoc_card_dapm_widgets);
if (asrc_pdev) {
priv->card.dapm_routes = fsl_asoc_card_is_ac97(priv) ?
audio_map_ac97 : audio_map;
priv->card.num_dapm_routes = ARRAY_SIZE(audio_map);
priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets;
priv->card.num_dapm_widgets = ARRAY_SIZE(fsl_asoc_card_dapm_widgets);
}
/* Drop the second half of DAPM routes -- ASRC */
if (!asrc_pdev)
......@@ -613,10 +653,12 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
memcpy(priv->dai_link, fsl_asoc_card_dai,
sizeof(struct snd_soc_dai_link) * ARRAY_SIZE(priv->dai_link));
ret = snd_soc_of_parse_audio_routing(&priv->card, "audio-routing");
if (ret) {
dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
goto asrc_fail;
if (asrc_pdev) {
ret = snd_soc_of_parse_audio_routing(&priv->card, "audio-routing");
if (ret) {
dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret);
goto asrc_fail;
}
}
/* Normal DAI Link */
......@@ -639,10 +681,6 @@ static int fsl_asoc_card_probe(struct platform_device *pdev)
devm_kasprintf(&pdev->dev, GFP_KERNEL,
"ac97-codec.%u",
(unsigned int)idx);
if (!priv->dai_link[0].codec_name) {
ret = -ENOMEM;
goto asrc_fail;
}
}
priv->dai_link[0].platform_of_node = cpu_np;
......@@ -706,6 +744,7 @@ static const struct of_device_id fsl_asoc_card_dt_ids[] = {
{ .compatible = "fsl,imx-audio-sgtl5000", },
{ .compatible = "fsl,imx-audio-wm8962", },
{ .compatible = "fsl,imx-audio-wm8960", },
{ .compatible = "fsl,imx-audio-wm8985", },
{}
};
MODULE_DEVICE_TABLE(of, fsl_asoc_card_dt_ids);
......
/*
* Freescale ALSA SoC Digital Audio Interface (ACM) driver.
*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This program is free software, you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation, either version 2 of the License, or(at your
* option) any later version.
*
*/
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/of_platform.h>
static int fsl_acm_probe(struct platform_device *pdev)
{
struct resource *res;
void __iomem *base;
pr_info("***** imx8qm_acm_init *****\n");
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(base))
return PTR_ERR(base);
return 0;
}
static const struct of_device_id fsl_acm_ids[] = {
{ .compatible = "nxp,imx8qm-acm", },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, fsl_acm_ids);
static struct platform_driver fsl_acm_driver = {
.probe = fsl_acm_probe,
.driver = {
.name = "fsl-acm",
.of_match_table = fsl_acm_ids,
},
};
module_platform_driver(fsl_acm_driver);
MODULE_DESCRIPTION("Freescale Soc ACM Interface");
MODULE_ALIAS("platform:fsl-acm");
MODULE_LICENSE("GPL");
/*
* fsl_acm.h - ALSA ACM interface for the Freescale i.MX SoC
*
* Copyright 2017 NXP
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#ifndef _FSL_ACM_H
#define _FSL_ACM_H
/* The offset of ACM control registers */
#define AUD_CLK0_SEL_OFF 0x00000
#define AUD_CLK1_SEL_OFF 0x10000
#define MCLKOUT0_SEL_OFF 0x20000
#define MCLKOUT1_SEL_OFF 0x30000
#define ASRC0_CLK_SEL_OFF 0x40000
#define ESAI0_CLK_SEL_OFF 0x60000
#define ESAI1_CLK_SEL_OFF 0x70000
#define GPT0_CLK_SEL_OFF 0x80000
#define GPT0_CAPIN1_SEL_OFF 0x80004
#define GPT0_CAPIN2_SEL_OFF 0x80008
#define GPT1_CLK_SEL_OFF 0x90000
#define GPT1_CAPIN1_SEL_OFF 0x90004
#define GPT1_CAPIN2_SEL_OFF 0x90008
#define GPT2_CLK_SEL_OFF 0xA0000
#define GPT2_CAPIN1_SEL_OFF 0xA0004
#define GPT2_CAPIN2_SEL_OFF 0xA0008
#define GPT3_CLK_SEL_OFF 0xB0000
#define GPT3_CAPIN1_SEL_OFF 0xB0004
#define GPT3_CAPIN2_SEL_OFF 0xB0008
#define GPT4_CLK_SEL_OFF 0xC0000
#define GPT4_CAPIN1_SEL_OFF 0xC0004
#define GPT4_CAPIN2_SEL_OFF 0xC0008
#define GPT5_CLK_SEL_OFF 0xD0000
#define GPT5_CAPIN1_SEL_OFF 0xD0004
#define GPT5_CAPIN2_SEL_OFF 0xD0008
#define SAI0_MCLK_SEL_OFF 0xE0000
#define SAI1_MCLK_SEL_OFF 0xF0000
#define SAI2_MCLK_SEL_OFF 0x100000
#define SAI3_MCLK_SEL_OFF 0x110000
#define SAI_HDMIRX0_MCLK_SEL_OFF 0x120000
#define SAI_HDMITX0_MCLK_SEL_OFF 0x130000
#define SAI6_MCLK_SEL_OFF 0x140000
#define SAI7_MCLK_SEL_OFF 0x150000
/* in imx8qxp SAI6=>SAI4, SAI7=>SAI5 */
#define SAI4_MCLK_SEL_OFF 0x140000
#define SAI5_MCLK_SEL_OFF 0x150000
#define SPDIF0_TX_CLK_SEL_OFF 0x1A0000
#define SPDIF1_TX_CLK_SEL_OFF 0x1B0000
#define MQS_HMCLK_SEL_OFF 0x1C0000
/* GPT CAPTURE Event definition*/
#define IPI_USB0_SOF 0
#define IPI_USB1_SOF 1
#define IPI_USB30_ITP 2
#define IPI_ETHERNET0_EVENT 3
#define IPI_ETHERNET1_EVENT 4
#define IPI_MPEG0_EVENT 5
#define IPI_MPEG1_EVENT 6
#define ASRC0_DMA1_REQ 7
#define ASRC0_DMA2_REQ 8
#define ASRC0_DMA3_REQ 9
#define ASRC0_DMA4_REQ 10
#define ASRC0_DMA5_REQ 11
#define ASRC0_DMA6_REQ 12
#define ESAI0_IPD_ESAI_RX_B 13
#define ESAI0_IPD_ESAI_TX_B 14
#define SPDIF0_DRQ0_SPDIF_B 15
#define SPDIF0_DRQ1_SPDIF_B 16
#define SPDIF1_DRQ0_SPDIF_B 17
#define SPDIF1_DRQ1_SPDIF_B 18
#define SAI_HDMIRX0_IPD_REQ_SAI_RX 19
#define SAI_HDMITX0_IPD_REQ_SAI_TX 20
#define ASRC1_DMA1_REQ 21
#define ASRC1_DMA2_REQ 22
#define ASRC1_DMA3_REQ 23
#define ASRC1_DMA4_REQ 24
#define ASRC1_DMA5_REQ 25
#define ASRC1_DMA6_REQ 26
#define ESAI1_IPD_ESAI_RX_B 27
#define ESAI1_IPD_ESAI_TX_B 28
#define SAI6_IPD_REQ_SAI_RX 29
#define SAI6_IPD_REQ_SAI_TX 30
#define SAI7_IPD_REQ_SAI_TX 31
#endif /* _FSL_ACM_H */
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/*
* Copyright 2017 NXP Corp.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __FSL_AMIX_H
#define __FSL_AMIX_H
#define FSL_AMIX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
SNDRV_PCM_FMTBIT_S24_LE |\
SNDRV_PCM_FMTBIT_S32_LE)
/* AMIX Registers */
#define FSL_AMIX_CTR 0x200 /* Control */
#define FSL_AMIX_STR 0x204 /* Status */
#define FSL_AMIX_ATCR0 0x208 /* Attenuation Control */
#define FSL_AMIX_ATIVAL0 0x20c /* Attenuation Initial Value */
#define FSL_AMIX_ATSTPUP0 0x210 /* Attenuation step up factor */
#define FSL_AMIX_ATSTPDN0 0x214 /* Attenuation step down factor */
#define FSL_AMIX_ATSTPTGT0 0x218 /* Attenuation step target */
#define FSL_AMIX_ATTNVAL0 0x21c /* Attenuation Value */
#define FSL_AMIX_ATSTP0 0x220 /* Attenuation step number */
#define FSL_AMIX_ATCR1 0x228 /* Attenuation Control */
#define FSL_AMIX_ATIVAL1 0x22c /* Attenuation Initial Value */
#define FSL_AMIX_ATSTPUP1 0x230 /* Attenuation step up factor */
#define FSL_AMIX_ATSTPDN1 0x234 /* Attenuation step down factor */
#define FSL_AMIX_ATSTPTGT1 0x238 /* Attenuation step target */
#define FSL_AMIX_ATTNVAL1 0x23c /* Attenuation Value */
#define FSL_AMIX_ATSTP1 0x240 /* Attenuation step number */
/* AMIX Control Register */
#define FSL_AMIX_CTR_MIXCLK_SHIFT 0
#define FSL_AMIX_CTR_MIXCLK_MASK (1 << FSL_AMIX_CTR_MIXCLK_SHIFT)
#define FSL_AMIX_CTR_MIXCLK(i) ((i) << FSL_AMIX_CTR_MIXCLK_SHIFT)
#define FSL_AMIX_CTR_OUTSRC_SHIFT 1
#define FSL_AMIX_CTR_OUTSRC_MASK (0x3 << FSL_AMIX_CTR_OUTSRC_SHIFT)
#define FSL_AMIX_CTR_OUTSRC(i) (((i) << FSL_AMIX_CTR_OUTSRC_SHIFT) \
& FSL_AMIX_CTR_OUTSRC_MASK)
#define FSL_AMIX_CTR_OUTWIDTH_SHIFT 3
#define FSL_AMIX_CTR_OUTWIDTH_MASK (0x7 << FSL_AMIX_CTR_OUTWIDTH_SHIFT)
#define FSL_AMIX_CTR_OUTWIDTH(i) (((i) << FSL_AMIX_CTR_OUTWIDTH_SHIFT) \
& FSL_AMIX_CTR_OUTWIDTH_MASK)
#define FSL_AMIX_CTR_OUTCKPOL_SHIFT 6
#define FSL_AMIX_CTR_OUTCKPOL_MASK (1 << FSL_AMIX_CTR_OUTCKPOL_SHIFT)
#define FSL_AMIX_CTR_OUTCKPOL(i) ((i) << FSL_AMIX_CTR_OUTCKPOL_SHIFT)
#define FSL_AMIX_CTR_MASKRTDF_SHIFT 7
#define FSL_AMIX_CTR_MASKRTDF_MASK (1 << FSL_AMIX_CTR_MASKRTDF_SHIFT)
#define FSL_AMIX_CTR_MASKRTDF(i) ((i) << FSL_AMIX_CTR_MASKRTDF_SHIFT)
#define FSL_AMIX_CTR_MASKCKDF_SHIFT 8
#define FSL_AMIX_CTR_MASKCKDF_MASK (1 << FSL_AMIX_CTR_MASKCKDF_SHIFT)
#define FSL_AMIX_CTR_MASKCKDF(i) ((i) << FSL_AMIX_CTR_MASKCKDF_SHIFT)
#define FSL_AMIX_CTR_SYNCMODE_SHIFT 9
#define FSL_AMIX_CTR_SYNCMODE_MASK (1 << FSL_AMIX_CTR_SYNCMODE_SHIFT)
#define FSL_AMIX_CTR_SYNCMODE(i) ((i) << FSL_AMIX_CTR_SYNCMODE_SHIFT)
#define FSL_AMIX_CTR_SYNCSRC_SHIFT 10
#define FSL_AMIX_CTR_SYNCSRC_MASK (1 << FSL_AMIX_CTR_SYNCSRC_SHIFT)
#define FSL_AMIX_CTR_SYNCSRC(i) ((i) << FSL_AMIX_CTR_SYNCSRC_SHIFT)
/* AMIX Status Register */
#define FSL_AMIX_STR_RATEDIFF BIT(0)
#define FSL_AMIX_STR_CLKDIFF BIT(1)
#define FSL_AMIX_STR_MIXSTAT_SHIFT 2
#define FSL_AMIX_STR_MIXSTAT_MASK (0x3 << FSL_AMIX_STR_MIXSTAT_SHIFT)
#define FSL_AMIX_STR_MIXSTAT(i) ((i & FSL_AMIX_STR_MIXSTAT_MASK) \
>> FSL_AMIX_STR_MIXSTAT_SHIFT)
/* AMIX Attenuation Control Register */
#define FSL_AMIX_ATCR_AT_EN BIT(0)
#define FSL_AMIX_ATCR_AT_UPDN BIT(1)
#define FSL_AMIX_ATCR_ATSTPDIF_SHIFT 2
#define FSL_AMIX_ATCR_ATSTPDFI_MASK (0xfff << FSL_AMIX_ATCR_ATSTPDIF_SHIFT)
/* AMIX Attenuation Initial Value Register */
#define FSL_AMIX_ATIVAL_ATINVAL_MASK 0x3FFFF
/* AMIX Attenuation Step Up Factor Register */
#define FSL_AMIX_ATSTPUP_ATSTEPUP_MASK 0x3FFFF
/* AMIX Attenuation Step Down Factor Register */
#define FSL_AMIX_ATSTPDN_ATSTEPDN_MASK 0x3FFFF
/* AMIX Attenuation Step Target Register */
#define FSL_AMIX_ATSTPTGT_ATSTPTG_MASK 0x3FFFF
/* AMIX Attenuation Value Register */
#define FSL_AMIX_ATTNVAL_ATCURVAL_MASK 0x3FFFF
/* AMIX Attenuation Step Number Register */
#define FSL_AMIX_ATSTP_STPCTR_MASK 0x3FFFF
#define FSL_AMIX_MAX_DAIS 2
struct fsl_amix {
struct platform_device *pdev;
struct regmap *regmap;
struct clk *ipg_clk;
u8 tdms;
};
#endif /* __FSL_AMIX_H */
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/*
* fsl_asrc.h - Freescale ASRC ALSA SoC header file
*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
* Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
*
* Author: Nicolin Chen <nicoleotsuka@gmail.com>
*
......@@ -13,6 +13,8 @@
#ifndef _FSL_ASRC_H
#define _FSL_ASRC_H
#include <uapi/linux/mxc_asrc.h>
#define IN 0
#define OUT 1
......@@ -23,7 +25,8 @@
#define ASRC_FIFO_THRESHOLD_MAX 63
#define ASRC_DMA_BUFFER_SIZE (1024 * 48 * 4)
#define ASRC_MAX_BUFFER_SIZE (1024 * 48)
#define ASRC_OUTPUT_LAST_SAMPLE 8
#define ASRC_OUTPUT_LAST_SAMPLE_MAX 32
#define ASRC_OUTPUT_LAST_SAMPLE 16
#define IDEAL_RATIO_RATE 1000000
......@@ -57,7 +60,7 @@
#define REG_ASRDOC 0x74
#define REG_ASRDI(i) (REG_ASRDIA + (i << 3))
#define REG_ASRDO(i) (REG_ASRDOA + (i << 3))
#define REG_ASRDx(x, i) ((x) == IN ? REG_ASRDI(i) : REG_ASRDO(i))
#define REG_ASRDx(x, i) (x == IN ? REG_ASRDI(i) : REG_ASRDO(i))
#define REG_ASRIDRHA 0x80
#define REG_ASRIDRLA 0x84
......@@ -260,8 +263,8 @@
#define ASRFSTi_OUTPUT_FIFO_SHIFT 12
#define ASRFSTi_OUTPUT_FIFO_MASK (((1 << ASRFSTi_OUTPUT_FIFO_WIDTH) - 1) << ASRFSTi_OUTPUT_FIFO_SHIFT)
#define ASRFSTi_IAEi_SHIFT 11
#define ASRFSTi_IAEi_MASK (1 << ASRFSTi_IAEi_SHIFT)
#define ASRFSTi_IAEi (1 << ASRFSTi_IAEi_SHIFT)
#define ASRFSTi_IAEi_MASK (1 << ASRFSTi_OAFi_SHIFT)
#define ASRFSTi_IAEi (1 << ASRFSTi_OAFi_SHIFT)
#define ASRFSTi_INPUT_FIFO_WIDTH 7
#define ASRFSTi_INPUT_FIFO_SHIFT 0
#define ASRFSTi_INPUT_FIFO_MASK ((1 << ASRFSTi_INPUT_FIFO_WIDTH) - 1)
......@@ -286,106 +289,10 @@
#define ASRMCR1i_OW16_MASK (1 << ASRMCR1i_OW16_SHIFT)
#define ASRMCR1i_OW16(v) ((v) << ASRMCR1i_OW16_SHIFT)
enum asrc_pair_index {
ASRC_INVALID_PAIR = -1,
ASRC_PAIR_A = 0,
ASRC_PAIR_B = 1,
ASRC_PAIR_C = 2,
};
#define ASRC_PAIR_MAX_NUM (ASRC_PAIR_C + 1)
enum asrc_inclk {
INCLK_NONE = 0x03,
INCLK_ESAI_RX = 0x00,
INCLK_SSI1_RX = 0x01,
INCLK_SSI2_RX = 0x02,