Commit fb8fb46c authored by Xiaochen Shen's avatar Xiaochen Shen Committed by Thomas Gleixner

x86/intel_rdt: Fix a typo in Documentation

Example 3 contains a typo:

"C0" in "# echo C0 > p0/cpus" is wrong because it specifies core
6-7 instead of wanted core 4-7.

Correct this typo to avoid confusion.
Signed-off-by: default avatarXiaochen Shen <xiaochen.shen@intel.com>
Acked-by: default avatarFenghua Yu <fenghua.yu@intel.com>
Cc: vikas.shivappa@linux.intel.com
Cc: tony.luck@intel.com
Link: http://lkml.kernel.org/r/1493781356-24229-1-git-send-email-xiaochen.shen@intel.comSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 4a1bec46
......@@ -295,7 +295,7 @@ kernel and the tasks running there get 50% of the cache. They should
also get 50% of memory bandwidth assuming that the cores 4-7 are SMT
siblings and only the real time threads are scheduled on the cores 4-7.
# echo C0 > p0/cpus
# echo F0 > p0/cpus
4) Locking between applications
......
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