• Vijaya Kumar K's avatar
    KVM: arm/arm64: vgic: Implement VGICv3 CPU interface access · d017d7b0
    Vijaya Kumar K authored
    VGICv3 CPU interface registers are accessed using
    KVM_DEV_ARM_VGIC_CPU_SYSREGS ioctl. These registers are accessed
    as 64-bit. The cpu MPIDR value is passed along with register id.
    It is used to identify the cpu for registers access.
    
    The VM that supports SEIs expect it on destination machine to handle
    guest aborts and hence checked for ICC_CTLR_EL1.SEIS compatibility.
    Similarly, VM that supports Affinity Level 3 that is required for AArch64
    mode, is required to be supported on destination machine. Hence checked
    for ICC_CTLR_EL1.A3V compatibility.
    
    The arch/arm64/kvm/vgic-sys-reg-v3.c handles read and write of VGIC
    CPU registers for AArch64.
    
    For AArch32 mode, arch/arm/kvm/vgic-v3-coproc.c file is created but
    APIs are not implemented.
    
    Updated arch/arm/include/uapi/asm/kvm.h with new definitions
    required to compile for AArch32.
    
    The version of VGIC v3 specification is defined here
    Documentation/virtual/kvm/devices/arm-vgic-v3.txt
    Acked-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
    Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
    Signed-off-by: default avatarPavel Fedin <p.fedin@samsung.com>
    Signed-off-by: default avatarVijaya Kumar K <Vijaya.Kumar@cavium.com>
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    d017d7b0
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