librem5-evk.dts : fix the i2c pinmuxes

arch/arm/dts/librem5-evk.dts

@@ -70,18 +70,24 @@
 
 		pinctrl_i2c1: i2c1grp {
 			fsl,pins = <
-				MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL			0x4000007f
-				MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA			0x4000007f
+				MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL			0x4000003f
+				MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA			0x4000003f
 			>;
 		};
 
 		pinctrl_i2c2: i2c2grp {
 			fsl,pins = <
-				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
-				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
+				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000003f
+				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000003f
 			>;
 		};
 
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000003f
+				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000003f
+			>;
+		};
 
 		pinctrl_pcie0: pcie0grp {
 			fsl,pins = <
@@ -282,6 +288,13 @@
 	status = "disabled";
 };
 
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+};
+
 &pcie0{
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pcie0>;