amd/mct/ddr3: Correctly configure CsMux45

The existing logic to set up CsMux45 used an incorrect mask
and comparison value due to a copy + paste editing error.

Use the correct mask and comparison value for the last two
values.

Found-by: Coverity Scan #1347385
Change-Id: Ic08a52977df90b9952e434e71cd12dbc6d7e1443
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18070Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>

src/northbridge/amd/amdmct/mct_ddr3/mctproc.c

@@ -43,7 +43,7 @@ u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat,
 			if ((((f2x80 & 0xf) == 0x7) || ((f2x80 & 0xf) == 0x9))
 				&& ((f2x60 & 0x3) == 0x3))
 				cs_mux_45 = 1;
-			else if ((((f2x80 & 0xa) == 0x7) || ((f2x80 & 0xb) == 0x9))
+			else if ((((f2x80 & 0xf) == 0xa) || ((f2x80 & 0xf) == 0xb))
 				&& ((f2x60 & 0x3) > 0x1))
 				cs_mux_45 = 1;
 			else