Commit 66f1f382 authored by Kane Chen's avatar Kane Chen Committed by Aaron Durbin

intel/common/smbus: increase spd read performance

This change increases the spd read performance by using smbus word
access.

BUG=b:67021853
TEST=boot to os and find 80~100 ms boot time improvement on one dimm

Change-Id: I98fe67642d8ccd428bccbca7f6390331d6055d14
Signed-off-by: default avatarKane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/22072Tested-by: default avatarbuild bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: default avatarAaron Durbin <adurbin@chromium.org>
parent dfd2a8b7
......@@ -1212,6 +1212,9 @@ config DIMM_SPD_SIZE
Total SPD size that will be used for DIMM.
Ex: DDR3 256, DDR4 512.
config SPD_READ_BY_WORD
bool
config BOARD_ID_AUTO
bool
default n
......
......@@ -63,6 +63,7 @@ void smbus_reset(u32 smbus_dev);
int smbus_print_error(u32 smbus_dev, u8 host_status, int loops);
int smbus_is_busy(u32 smbus_dev);
int smbus_wait_until_ready(u32 smbus_dev);
u16 smbus_read_word(u32 smbus_dev, u8 addr, u8 offset);
u8 smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset);
u8 smbus_write_byte(u32 smbus_dev, u8 addr, u8 offset, u8 value);
void smbus_delay(void);
......
......@@ -125,26 +125,40 @@ int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index)
CONFIG_DIMM_SPD_SIZE);
}
static void get_spd(u8 *spd, u8 addr)
static void smbus_read_spd(u8 *spd, u8 addr)
{
u16 i;
if (smbus_read_byte(0, addr, 0) == 0xff) {
u8 step = 1;
if (IS_ENABLED(CONFIG_SPD_READ_BY_WORD))
step = sizeof(uint16_t);
for (i = 0; i < SPD_PAGE_LEN; i += step) {
if (IS_ENABLED(CONFIG_SPD_READ_BY_WORD))
((u16*)spd)[i / sizeof(uint16_t)] =
smbus_read_word(0, addr, i);
else
spd[i] = smbus_read_byte(0, addr, i);
}
}
static void get_spd(u8 *spd, u8 addr)
{
if (smbus_read_byte(0, addr, 0) == 0xff) {
printk(BIOS_INFO, "No memory dimm at address %02X\n",
addr << 1);
/* Make sure spd is zeroed if dimm doesn't exist. */
memset(spd, 0, CONFIG_DIMM_SPD_SIZE);
return;
}
smbus_read_spd(spd, addr);
for (i = 0; i < SPD_PAGE_LEN; i++)
spd[i] = smbus_read_byte(0, addr, i);
/* Check if module is DDR4, DDR4 spd is 512 byte. */
if (spd[SPD_DRAM_TYPE] == SPD_DRAM_DDR4 &&
CONFIG_DIMM_SPD_SIZE >= SPD_DRAM_DDR4) {
CONFIG_DIMM_SPD_SIZE > SPD_PAGE_LEN) {
/* Switch to page 1 */
smbus_write_byte(0, SPD_PAGE_1, 0, 0);
for (i = 0; i < SPD_PAGE_LEN; i++)
spd[i+SPD_PAGE_LEN] = smbus_read_byte(0, addr, i);
smbus_read_spd(spd + SPD_PAGE_LEN, addr);
/* Restore to page 0 */
smbus_write_byte(0, SPD_PAGE_0, 0, 0);
}
......
......@@ -36,6 +36,11 @@ static const struct reg_script smbus_init_script[] = {
REG_SCRIPT_END,
};
u16 smbus_read_word(u32 smbus_dev, u8 addr, u8 offset)
{
return smbus_read16(SMBUS_IO_BASE, addr, offset);
}
u8 smbus_read_byte(u32 smbus_dev, u8 addr, u8 offset)
{
return smbus_read8(SMBUS_IO_BASE, addr, offset);
......
......@@ -135,3 +135,44 @@ int smbus_write8(unsigned int smbus_base, unsigned int device,
return 0;
}
int smbus_read16(unsigned int smbus_base, unsigned int device,
unsigned int address)
{
unsigned char global_status_register;
unsigned short data;
if (smbus_wait_till_ready(smbus_base) < 0)
return SMBUS_WAIT_UNTIL_READY_TIMEOUT;
/* Set up transaction */
/* Disable interrupts */
outb(inb(smbus_base + SMBHSTCTL) & ~1, smbus_base + SMBHSTCTL);
/* Set the device I'm talking to */
outb(((device & 0x7f) << 1) | 1, smbus_base + SMBXMITADD);
/* Set the command/address... */
outb(address & 0xff, smbus_base + SMBHSTCMD);
/* Set up for a word data read */
outb((inb(smbus_base + SMBHSTCTL) & 0xe3) | (0x3 << 2),
(smbus_base + SMBHSTCTL));
/* Clear any lingering errors, so the transaction will run */
outb(inb(smbus_base + SMBHSTSTAT), smbus_base + SMBHSTSTAT);
/* Start the command */
outb((inb(smbus_base + SMBHSTCTL) | 0x40),
smbus_base + SMBHSTCTL);
/* Poll for transaction completion */
if (smbus_wait_till_done(smbus_base) < 0)
return SMBUS_WAIT_UNTIL_DONE_TIMEOUT;
global_status_register = inb(smbus_base + SMBHSTSTAT);
/* Ignore the "In Use" status... */
if ((global_status_register & ~(3 << 5)) != (1 << 1))
return SMBUS_ERROR;
/* Read results of transaction */
data = inw(smbus_base + SMBHSTDAT0);
return data;
}
......@@ -34,5 +34,7 @@ int smbus_read8(unsigned int smbus_base, unsigned int device,
unsigned int address);
int smbus_write8(unsigned int smbus_base, unsigned int device,
unsigned int address, unsigned int data);
int smbus_read16(unsigned int smbus_base, unsigned int device,
unsigned int address);
#endif /* SOC_INTEL_COMMON_BLOCK_SMBUS__LIB_H */
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