Commit a9f90bdf authored by Martin Kepplinger's avatar Martin Kepplinger
Browse files

arm64: imx8mq: remove mipi csi alias

parent 1e22941b
...@@ -21,8 +21,6 @@ ...@@ -21,8 +21,6 @@
#size-cells = <2>; #size-cells = <2>;
aliases { aliases {
csi0 = &mipi_csi1;
csi1 = &mipi_csi2;
ethernet0 = &fec1; ethernet0 = &fec1;
gpio0 = &gpio1; gpio0 = &gpio1;
gpio1 = &gpio2; gpio1 = &gpio2;
...@@ -1172,7 +1170,7 @@ ...@@ -1172,7 +1170,7 @@
mipi_csi1: csi@30a70000 { mipi_csi1: csi@30a70000 {
compatible = "fsl,imx8mq-mipi-csi2"; compatible = "fsl,imx8mq-mipi-csi2";
reg = <0x30a70000 0x1000>; /* MIPI CSI1 Controller base addr */ reg = <0x30a70000 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_CSI1_CORE>, clocks = <&clk IMX8MQ_CLK_CSI1_CORE>,
<&clk IMX8MQ_CLK_CSI1_ESC>, <&clk IMX8MQ_CLK_CSI1_ESC>,
...@@ -1225,7 +1223,7 @@ ...@@ -1225,7 +1223,7 @@
mipi_csi2: csi@30b60000 { mipi_csi2: csi@30b60000 {
compatible = "fsl,imx8mq-mipi-csi2"; compatible = "fsl,imx8mq-mipi-csi2";
reg = <0x30b60000 0x1000>; /* MIPI CSI2 Controller base addr */ reg = <0x30b60000 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_CSI2_CORE>, clocks = <&clk IMX8MQ_CLK_CSI2_CORE>,
<&clk IMX8MQ_CLK_CSI2_ESC>, <&clk IMX8MQ_CLK_CSI2_ESC>,
......
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