librem5-evk.dtsi 29.6 KB
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/*
 * Copyright 2017 NXP
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/*
 * Define this to enable i2c3 channel instead of pwm4 on IMX8M-SOM-BSB
 * #define I2C3_ENABLE
 */
#define I2C3_ENABLE

/*
 * Define this to enable camera on CSI2 channel instead of CSI1
 * #define CSI2_CAM_ENABLE
 */

#include "imx8mq.dtsi"
#include "dt-bindings/usb/pd.h"
#include "dt-bindings/input/input.h"

/ {
	model = "Purism Librem 5 devkit";
	compatible = "emcraft,imx8m-som", "fsl,imx8mq", "fsl,imx7d";

	chosen {
		bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
		stdout-path = &uart1;
	};

	regulators {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		reg_usdhc2_vmmc: usdhc2_vmmc {
			compatible = "regulator-fixed";
			regulator-name = "VSD_3V3";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
		};

		reg_pwr_en: pwr_en {
			compatible = "regulator-fixed";
			regulator-name = "PWR_EN";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio1 8 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
		};

		wifi_pwr_en: wifi_en {
			compatible = "regulator-fixed";
			regulator-name = "WIFI_EN";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>;
			enable-active-high;
			regulator-always-on;
		};
	};

	modem_reset: modem_reset {
		compatible = "gpio-reset";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_modem_reset>;
		reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
		reset-delay-us = <2000>;
		reset-post-delay-ms = <40>;
		#reset-cells = <0>;
	};

	sound_osc: oscillator {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency  = <12000000>;
		clock-output-names = "sound_osc";
	};

	mclk: mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <26000000>;
		clock-output-names = "mclk";
	};

        sound {
                compatible = "simple-audio-card";
		simple-audio-card,name = "sgtl5000";
                simple-audio-card,format = "i2s";
                simple-audio-card,widgets =
                        "Microphone", "Microphone Jack",
                        "Headphone", "Headphone Jack",
                        "Speaker", "Speaker Ext",
                        "Line", "Line In Jack";
                simple-audio-card,routing =
                        "MIC_IN", "Microphone Jack",
                        "Microphone Jack", "Mic Bias",
                        "LINE_IN", "Line In Jack",
                        "Headphone Jack", "HP_OUT",
                        "Speaker Ext", "LINE_OUT";

                simple-audio-card,cpu {
                        sound-dai = <&sai2>;
                };

                simple-audio-card,codec {
                        sound-dai = <&sgtl5000>;
                        frame-master;
                        bitclock-master;
                };
        };

#if TODO
	sound-hdmi {
		compatible = "fsl,imx-audio-cdnhdmi";
		model = "imx-audio-hdmi";
		audio-cpu = <&sai4>;
		protocol = <1>;
	};

	sound-spdif {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-spdif";
		spdif-controller = <&spdif1>;
		spdif-out;
		spdif-in;
		status = "disabled";
	};

	sound-hdmi-arc {
		compatible = "fsl,imx-audio-spdif";
		model = "imx-hdmi-arc";
		spdif-controller = <&spdif2>;
		spdif-in;
	};
#endif

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>, <&pinctrl_mute>, <&pinctrl_micsel>, <&pinctrl_pwr_en>;
		status = "okay";

		led1 {
			label = "LED 1";
			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};

		csi_nrst {
			label = "CSI_nRST";
			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};

		csi_pdwn {
			label = "CSI_PDWN";
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
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		spk_mute {
			label = "SPK_MUTE";
			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
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			default-state = "on";
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		};
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		mic_sel {
			label = "MIC_SEL";
 			gpios = <&gpio5 5 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};
	};

	pwmleds {
                compatible = "pwm-leds";
                haptic {
                        label = "nxp::haptic";
                	pwms = <&pwm2 0 200000>;
			active-low;
                        max-brightness = <255>;
                };
        };

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;

		btn1 {
			label = "BTN 1";
			gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
			linux,code = <KEY_VOLUMEUP>;
		};
		btn2 {
			label = "BTN 2";
			gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
			linux,code = <KEY_VOLUMEDOWN>;
		};
		hp_det {
			label = "HP_DET";
			gpios = <&gpio3 20 GPIO_ACTIVE_LOW>;
			gpio-key,wakeup;
			linux,code = <KEY_HP>;
		};
	};

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        backlight_dsi: backlight_dsi {
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                compatible = "pwm-backlight";
                /* 200 Hz for the PAM2841 */
                pwms = <&pwm1 0 5000000>;
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                brightness-levels = < 0  1  2  3  4  5  6  7  8  9
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                                    100>;
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                /* Default brightness level (index into the array defined by the "brightness-levels" property) */
                default-brightness-level = <0>;
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                status = "disabled";
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        };
};


&clk {
	assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1>;
	assigned-clock-rates = <786432000>;
};

&iomuxc {
	imx8m-som {
		pinctrl_nc: ncgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI1_MCLK_SAI1_MCLK 		0x00
				MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL			0x4000007f
				MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA			0x4000007f
			>;
		};

		pinctrl_up: upgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 		0x00
			>;
		};

		pinctrl_csi1: csi1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x11  /* CSI_nRST */
				MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19  /* CSI_PWDN */
				MX8MQ_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1	0x19  /* CLK01 */
			>;
		};

		pinctrl_pwr_en: pwr_engrp {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO08_GPIO1_IO8               0x06
			>;
		};

		pinctrl_wwan: wwan_grp {
			fsl,pins = <
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				MX8MQ_IOMUXC_NAND_CE3_B_GPIO3_IO4	0x09	/* nWWAN_DISABLE */
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				MX8MQ_IOMUXC_NAND_DATA02_GPIO3_IO8	0x80	/* nWoWWAN */
				MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x19	/* WWAN_RESET */
			>;
		};

		pinctrl_dsi: dsigrp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_DATA07_GPIO3_IO13	0x16
			>;
		};
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		pinctrl_fec1: fec1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC		0x3
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				MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO	0x3
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				MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3	0x1f
				MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2	0x1f
				MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1	0x1f
				MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0	0x1f
				MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3	0x91
				MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2	0x91
				MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1	0x91
				MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0	0x91
				MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC	0x1f
				MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC	0x91
				MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
				MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
				MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x19
				MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
			>;
		};

		pinctrl_hdmi: hdmigrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI3_MCLK_GPIO5_IO2	0x16
			>;
		};

		pinctrl_i2c1: i2c1grp {
			fsl,pins = <
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				MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL			0x4000001f
				MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA			0x4000001f
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			>;
		};

		pinctrl_i2c2: i2c2grp {
			fsl,pins = <
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				MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000001f
				MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000001f
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			>;
		};

		pinctrl_i2c3: i2c3grp {
			fsl,pins = <
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				MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL			0x4000001f
				MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA			0x4000001f
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			>;
		};

		pinctrl_pcie0: pcie0grp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15	0x16
				MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11	0x16
				MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10	0x16
			>;
		};

		pinctrl_pcie1: pcie1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_WP_B_GPIO3_IO18	0x16
				MX8MQ_IOMUXC_NAND_CLE_GPIO3_IO5	0x16
				MX8MQ_IOMUXC_NAND_WE_B_GPIO3_IO17	0x16
			>;
		};


		pinctrl_typec: typecgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12	0x16
 				MX8MQ_IOMUXC_NAND_CE0_B_GPIO3_IO1	0x80
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
				MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
				MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
				MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
				MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX		0x49
				MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX		0x49
			>;
		};

		pinctrl_uart4: uart4grp {
			fsl,pins = <
				MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
				MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
				MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
				MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
				MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x49
			>;
		};

		pinctrl_bt: btgrp {
			fsl,pins = <
				/* BT_REG_ON */
				MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11             0x16  /* nBT_DISABLE */
				MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7              0x10  /* BT_HOST_WAKE */
				>;
		};

		pinctrl_modem_reset: modem_reset {
			fsl,pins = <
				MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9      	0x19    /* WWAN_RESET */
			>;
		};

		pinctrl_usdhc1: usdhc1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
				MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
			>;
		};

		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
				MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
			>;
		};

		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
				MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
				MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
				MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
				MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
				MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
				MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
				MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
				MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
				MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
				MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
				MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
			>;
		};

		pinctrl_usdhc2_gpio: usdhc2grpgpio {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19		0x41
				MX8MQ_IOMUXC_SD2_WP_GPIO2_IO20			0x80 	/* WIFI_WAKE */
			>;
		};

		pinctrl_usdhc2: usdhc2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
			>;
		};

		pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x8d
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcd
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcd
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcd
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcd
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcd
			>;
		};

		pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
			fsl,pins = <
				MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x9f
				MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xcf
				MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xcf
				MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xcf
				MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xcf
				MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xcf
			>;
		};

		pinctrl_sai2: sai2grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
				MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
				MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
				MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
				MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
			>;
		};

		pinctrl_sai5: sai5grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0	0xd6
				MX8MQ_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC	0xd6
				MX8MQ_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK     0xd6
				MX8MQ_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0	0xd6
			>;
		};

		pinctrl_sai6: sai6grp {
			fsl,pins = <
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				MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
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				MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
				MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK     0xd6
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				MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
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			>;
		};

		pinctrl_spdif1: spdif1grp {
			fsl,pins = <
				MX8MQ_IOMUXC_SPDIF_TX_SPDIF1_OUT	0xd6
				MX8MQ_IOMUXC_SPDIF_RX_SPDIF1_IN		0xd6
			>;
		};

		pinctrl_wdog: wdoggrp {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 	0xc6
			>;
		};

		pinctrl_pwm1: pwm1 {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO01_PWM1_OUT 	0x6  /* DSI_BL_PWM */
			>;
		};
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		pinctrl_micsel: micselgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 	0xc6  /* mic sel */
			>;
		};

		pinctrl_haptic: hapticgrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SPDIF_RX_PWM2_OUT 		0xc6  /* nHAPTIC */
			>;
		};

		pinctrl_mute: mute {
			fsl,pins = <
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				MX8MQ_IOMUXC_SPDIF_TX_GPIO5_IO3 	0x86  /* MUTE */
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			>;
		};

		pinctrl_pwm4: pwm4 {
			fsl,pins = <
				MX8MQ_IOMUXC_I2C3_SCL_PWM4_OUT 		0xc6
			>;
		};

		pinctrl_prox: prox_nint {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO12_GPIO1_IO12	0x80
			>;
		};

		pinctrl_charger: charger_nirq {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x80 /* CHRG_nINT */
			>;
		};

		pinctrl_rtc: rtcirq {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x80
			>;
		};

		pinctrl_pmic: pmic_int {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x80
			>;
		};

		pinctrl_spi1: spi1 {
			fsl,pins = <
				MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK	0x0f
				MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI	0x0f
				MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO	0x0f
				MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x09
			>;
		};

		pinctrl_imu: imugrp {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI5_RXFS_GPIO3_IO19	0x80 /* IMU_INT */
			>;
		};

		pinctrl_gpio_leds: gpioleds {
			fsl,pins = <
				MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13	0x16
			>;
		};

		pinctrl_gpio_keys: gpiokeys {
			fsl,pins = <
				MX8MQ_IOMUXC_SAI2_RXFS_GPIO4_IO21	0x16
				MX8MQ_IOMUXC_SAI2_RXC_GPIO4_IO22	0x16
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				MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x1C0 /* HP_DET */
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			>;
		};

                pinctrl_goodix_ts: gt5688 {
                        fsl,pins = <
                                MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0         0x16    /* TOUCH INT */
				MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x19    /* TOUCH RST */
                        >;
                };

	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi1>;
	status = "okay";
	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	#address-cells = <1>;
	#size-cells = <0>;

	flash: mx25l1606e@0 {
	       	compatible = "jedec,spi-nor";
	       	spi-max-frequency = <20000000>;
	       	reg = <0>;
		#address-cells = <1>;
		#size-cells = <1>;

	      	mtd0@00000000 {
			label = "flash";
		       	reg = <0x0 0x200000>;
	       	};
       };
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";
	phy-supply = <&reg_pwr_en>;

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;

		ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			at803x,led-act-blind-workaround;
			at803x,eee-disabled;
			power-supply = <&reg_pwr_en>;
		};
	};
};

&i2c1 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c1>;
	status = "okay";

	pmic: bd71837@4b {
		reg = <0x4b>;
		compatible = "rohm,bd71837";
		pinctrl-0 = <&pinctrl_pmic>;
		gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;

		bd71837,pmic-buck1-uses-i2c-dvs;
		bd71837,pmic-buck1-dvs-voltage = <900000>, <850000>, <800000>; /* VDD_SOC: Run-Idle-Suspend */
		bd71837,pmic-buck2-uses-i2c-dvs;
		bd71837,pmic-buck2-dvs-voltage = <1000000>, <900000>, <0>; /* VDD_ARM: Run-Idle */
		bd71837,pmic-buck3-uses-i2c-dvs;
		bd71837,pmic-buck3-dvs-voltage = <1000000>, <0>, <0>; /* VDD_GPU: Run */
		bd71837,pmic-buck4-uses-i2c-dvs;
		bd71837,pmic-buck4-dvs-voltage = <1000000>, <0>, <0>; /* VDD_VPU: Run */

		gpo {
			rohm,drv = <0x0C>;	/* 0b0000_1100 all gpos with cmos output mode */
		};

		regulators {
			#address-cells = <1>;
			#size-cells = <0>;

			buck1_reg: regulator@0 {
				reg = <0>;
				regulator-compatible = "buck1";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck2_reg: regulator@1 {
				reg = <1>;
				regulator-compatible = "buck2";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck3_reg: regulator@2 {
				reg = <2>;
				regulator-compatible = "buck3";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck4_reg: regulator@3 {
				reg = <3>;
				regulator-compatible = "buck4";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck5_reg: regulator@4 {
				reg = <4>;
				regulator-compatible = "buck5";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1350000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck6_reg: regulator@5 {
				reg = <5>;
				regulator-compatible = "buck6";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck7_reg: regulator@6 {
				reg = <6>;
				regulator-compatible = "buck7";
				regulator-min-microvolt = <1605000>;
				regulator-max-microvolt = <1995000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck8_reg: regulator@7 {
				reg = <7>;
				regulator-compatible = "buck8";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <1400000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1_reg: regulator@8 {
				reg = <8>;
				regulator-compatible = "ldo1";
				regulator-min-microvolt = <3000000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo2_reg: regulator@9 {
				reg = <9>;
				regulator-compatible = "ldo2";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <900000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3_reg: regulator@10 {
				reg = <10>;
				regulator-compatible = "ldo3";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4_reg: regulator@11 {
				reg = <11>;
				regulator-compatible = "ldo4";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo5_reg: regulator@12 {
				reg = <12>;
				regulator-compatible = "ldo5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo6_reg: regulator@13 {
				reg = <13>;
				regulator-compatible = "ldo6";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo7_reg: regulator@14 {
				reg = <14>;
				regulator-compatible = "ldo7";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};

	typec_ptn5100: ptn5110@50 {
		compatible = "nxp,ptn5110";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_typec>;
		reg = <0x52>;
		interrupt-parent = <&gpio3>;
		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
		ss-sel-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
		usb_con: connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			data-role = "dual";
			power-role = "dual";
			try-power-role = "sink";
			source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>;
			sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)
				     PDO_VAR(5000, 12000, 2000)>;
			op-sink-microwatt = <10000000>;
			init-vbus-sink;
			init-vbus-source;
			ports {
				#address-cells = <1>;
				#size-cells = <0>;
				port@0 {
					reg = <0>;
					usb_con_hs: endpoint {
						remote-endpoint = <&typec_hs>;
					};
				};
				port@1 {
					reg = <1>;
					usb_con_ss: endpoint {
						remote-endpoint = <&typec_ss>;
					};
				};
			};
		};

	};

	charger: charger@6b { /* bq25896 */
		compatible = "ti,bq25896";
		reg = <0x6b>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_charger>;
		interrupt-parent = <&gpio3>;
		interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
		ti,battery-regulation-voltage = <4192000>; // 4.196V
		ti,charge-current = <1600000>; // 1.6 A
		ti,termination-current = <66000>;  // 66mA
		ti,precharge-current = <1300000>; // 1.3A
		ti,minimum-sys-voltage = <2750000>; // 2.75V
		ti,boost-voltage = <5000000>; // 5V
		ti,boost-max-current = <50000>; // 50mA
	};

        rtc@68 {
		pinctrl-names = "default";
                compatible = "microcrystal,rv4162";
                reg = <0x68>;
		pinctrl-0 = <&pinctrl_rtc>;
		interrupt-parent = <&gpio4>;
		interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
        };
};

&i2c2 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "disabled";
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c3>, <&pinctrl_imu>;
	status = "okay";

	ov5640_mipi: ov5640_mipi@3c {
		compatible = "ovti,ov5640";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_csi1>;
		// TODO : add these back in at some point
/*
                reset = <&gpio1 6 GPIO_ACTIVE_LOW>;
                powerdown = <&gpio1 7 GPIO_ACTIVE_HIGH>;
*/
		reg = <0x3c>;
		status = "okay";
		clocks = <&clk IMX8MQ_CLK_CLKO1_DIV>;
		clock-names = "xclk";
		// TODO : need to change the parent clocks if we want 24Mhz
		assigned-clocks = <&clk IMX8MQ_CLK_CLKO1_DIV>;
		assigned-clock-rates = <12500000>;
		csi_id = <0>;
		pwn-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
		mclk = <20000000>;
		mclk_source = <0>;
		port {
			ov5640_mipi1_ep: endpoint {
				remote-endpoint = <&mipi1_sensor_ep>;
			};
		};
	};

        goodix_ts@5d {
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                compatible = "goodix,gt5688";
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                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_goodix_ts>;
                reg = <0x5d>;
                interrupt-parent = <&gpio3>;
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		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		reset-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
		irq-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
		touchscreen-size-x = <720>;
		touchscreen-size-y = <1440>;
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        };

	sgtl5000: sgtl5000@a {
		compatible = "fsl,sgtl5000";
		clocks = <&clk IMX8MQ_CLK_SAI2_DIV>;
		// <&clk IMX8MQ_CLK_SAI2_ROOT>
		clock-names = "mclk";
		#sound-dai-cells = <0>;
		reg = <0x0a>;
		VDDD-supply = <&buck7_reg>;
		VDDIO-supply = <&ldo3_reg>;
		VDDA-supply = <&ldo3_reg>;
	};

        lsm9d: lsm9d@6a {
                compatible = "st,lsm9ds1-gyro";
		reg = <0x6a>;
		interrupt-parent = <&gpio3>;
		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
		power-supply = <&reg_pwr_en>;
	};
};

&uart1 { /* console */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART1_SRC>;
	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART3_SRC>;
	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
	status = "okay";
};

&uart4 { /* BT */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>, <&pinctrl_bt>;
	assigned-clocks = <&clk IMX8MQ_CLK_UART4_SRC>;
	assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
	fsl,uart-has-rtscts;
	/* resets = <&modem_reset>; */
	status = "okay";
};

&usdhc1 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc1>;
	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	bus-width = <4>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	power-supply = <&wifi_pwr_en>;

	non-removable;
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	disable-wp;
	cap-sdio-irq;
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	keep-power-in-suspend;
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	wakeup-source;
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	status = "okay";
};

&usb_otg1_pd{
	power-supply = <&reg_pwr_en>;
};

&usb3_phy0 {
	status = "okay";
	#address-cells = <1>;
	#size-cells = <0>;
	port@0 {
		reg = <0>;
		typec_hs: endpoint {
			remote-endpoint = <&usb_con_hs>;
		};
	};
	port@1 {
		reg = <1>;
		typec_ss: endpoint {
			remote-endpoint = <&usb_con_ss>;
		};
	};

};

&usb3_0 {
	status = "okay";
	// power-supply = <&reg_pwr_en>;
	power-domains = <&usb_otg1_pd>;
};

&usb_dwc3_0 {
	status = "okay";
	extcon = <&typec_ptn5100>;
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	dr_mode = "peripheral";
	snps,dis_u3_susphy_quirk;
	snps,dis_u2_susphy_quirk;
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};

&usb_otg2_pd{
	power-supply = <&reg_pwr_en>;
};

&usb3_phy1 {
	status = "okay";
};

&usb3_1 {
	status = "okay";
	// power-supply = <&reg_pwr_en>;
	power-domains = <&usb_otg2_pd>;
};

&usb_dwc3_1 {
	status = "okay";
	dr_mode = "host";
};

&sai2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai2>;
	#sound-dai-cells = <0>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI2_SRC>,
			<&clk IMX8MQ_CLK_SAI2_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;

	status = "okay";
};

&sai5 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai5>;
	assigned-clocks = <&clk IMX8MQ_CLK_SAI5_SRC>,
			<&clk IMX8MQ_CLK_SAI5_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
1119

1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209
	status = "okay";
};

&sai6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_sai6>;

	assigned-clocks = <&clk IMX8MQ_CLK_SAI6_SRC>,
			<&clk IMX8MQ_CLK_SAI6_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;

	status = "okay";
};

#ifdef TODO
&spdif1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spdif1>;
	assigned-clocks = <&clk IMX8MQ_CLK_SPDIF1_SRC>,
			<&clk IMX8MQ_CLK_SPDIF1_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "disabled";
};

&spdif2 {
	assigned-clocks = <&clk IMX8MQ_CLK_SPDIF2_SRC>,
			<&clk IMX8MQ_CLK_SPDIF2_DIV>;
	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
	assigned-clock-rates = <0>, <24576000>;
	status = "okay";
};

&gpu_pd {
// TBD: define correct power supply
//	power-supply = <&sw1a_reg>;
};

&vpu_pd {
// TBD: define correct power supply
//	power-supply = <&sw1c_reg>;
};

&vpu {
	status = "okay";
};

#endif

&gpu_3d {
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};

&rpmsg{
	/*
	 * 64K for one rpmsg instance:
	 * --0xb8000000~0xb800ffff: pingpong
	 */
	vdev-nums = <1>;
	reg = <0x0 0x58000000 0x0 0x10000>;
	status = "okay";
};

&mu {
	status = "okay";
};

&A53_0 {
	operating-points = <
		/* kHz    uV */
		1500000 1000000
		1300000 1000000
		1000000 900000
		800000  900000
	>;
	dc-supply = <&buck2_reg>;
};

&dcss {
	status = "okay";

       disp-dev = "hdmi_disp";
1210
       disp-mode = <5>;
1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271
};

&hdmi {
	status = "okay";
};

&hdmi_cec {
	/* TODO */
	status = "disabled";
};

&csi1_bridge {
	fsl,mipi-mode;
	/* fsl,two-8bit-sensor-mode; */
	status = "okay";

	port {
		csi1_ep: endpoint {
			remote-endpoint = <&csi1_mipi_ep>;
		};
	};
};


&mipi_csi_1 {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";
	port {
		mipi1_sensor_ep: endpoint1 {
			remote-endpoint = <&ov5640_mipi1_ep>;
			data-lanes = <1 2>;
		};

		csi1_mipi_ep: endpoint2 {
			remote-endpoint = <&csi1_ep>;
		};
	};
};

&pwm1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm1>;
	status = "okay";
};

&pwm2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_haptic>;
	status = "okay";
};

&pwm4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm4>;
#ifdef I2C3_ENABLE
	status = "disabled";
#else
	status = "okay";
#endif
};