Commit 8177384b authored by Eric Kuzmenko's avatar Eric Kuzmenko
Browse files

Try panel vendor's code

parent 6eebdeaf
Pipeline #3230 passed with stage
in 37 minutes and 15 seconds
......@@ -44,22 +44,23 @@ struct jh057n {
bool enabled;
};
#define HDISP 720
#define VDISP 1440
static const struct drm_display_mode default_mode = {
.hdisplay = 720,
.hsync_start = 720 + 90 /* front porch */,
.hsync_end = 720 + 90 + 20 /* sync_len */,
.htotal = 720 + 90 + 20 + 20 /* back porch */,
.vdisplay = 1440,
.vsync_start = 1440 + 20 /* front porch */,
.vsync_end = 1440 + 20 + 4 /* sync_len */,
.vtotal = 1440 + 20 + 4 + 12 /* back porch */,
.vrefresh = 60, /* confirmed from qualcom XML */
/* htotal * vtotal * vrefresh / 1000 */
/* actually 71638 but vendor suggets 75 Mhz */
.clock = 75000, /* kHz */
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 65,
.height_mm = 130,
.clock = 105000, //125000
.hdisplay = HDISP,
.hsync_start = HDISP*2 + 12,
.hsync_end = HDISP*2 + 12 + 2,
.htotal = HDISP*2 + 12 + 2 + 18,
.vdisplay = VDISP,
.vsync_start = VDISP + 4,
.vsync_end = VDISP + 4 + 2,
.vtotal = VDISP + 4 + 2 + 7,
.vrefresh = 50,
.flags = 0,
.width_mm = 68,
.height_mm = 120,
};
......@@ -114,75 +115,28 @@ static int jh057n_init_sequence(struct jh057n *ctx)
msleep(200);
/* Enable user command */
dcs_write_seq(ctx, ST7703_CMD_SETEXTC, /* 3 */
0xF1, 0x12, 0x83);
/* 6 params in ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETMIPI, /* 27 */
0x33, 0x81, 0x05, 0xF9, 0x0E, 0x0E, 0x20, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25,
0x00, 0x91, 0x0A, 0x00, 0x00, 0x02, 0x4F, 0x11,
0x00, 0x00, 0x37);
/* 6 params in ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETPOWER_EXT, /* 4 */
0x76, 0x22, 0x20, 0x03);
/* 4 params in ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETRGBIF, /* 10 */
0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00,
0x00, 0x00);
/* 8 params in ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETSCR, /* 9 */
0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70,
0x00);
/* -1.6V & + 1.9V */
dcs_write_seq(ctx, ST7703_CMD_SETVDC, 0x4E);
/* SS_PANEL, REV_PANEL, BGR_PANEL */
dcs_write_seq(ctx, ST7703_CMD_SETPANEL, 0x0B);
/* 2 params in ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETCYC, 0x80);
/* weird values, e.g. a 720 panel has BIT(1) 3rd param */
dcs_write_seq(ctx, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30);
dcs_write_seq(ctx, ST7703_CMD_SETEQ, /* 14 */
0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00,
0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
dcs_write_seq(ctx, ST7703_CMD_SETPOWER, /* 12 */
0x54, 0x00, 0x1E, 0x1E, 0x77, 0xF1, 0xFF, 0xFF,
0xCC, 0xCC, 0x77, 0x77);
/* setbgp is different from our first data set*/
dcs_write_seq(ctx, ST7703_CMD_SETBGP, 0x08, 0x08);
dcs_write_seq(ctx, 0xB9, 0xF1, 0x12, 0x83);
dcs_write_seq(ctx, 0xBA, 0x33, 0x81, 0x05, 0xF9, 0x0e, 0x0e, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4F, 0x11, 0x00, 0x00, 0x37);
dcs_write_seq(ctx, 0xB8, 0x26, 0x22, 0x20, 0x03);
dcs_write_seq(ctx, 0xB3, 0x10, 0x10, 0x05, 0x05, 0x03, 0xFF, 0x00, 0x00, 0x00, 0x00);
dcs_write_seq(ctx, 0xC0, 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, 0x00);
dcs_write_seq(ctx, 0xBC, 0x4E);
dcs_write_seq(ctx, 0xCC, 0x0B);
dcs_write_seq(ctx, 0xB4, 0x80);
dcs_write_seq(ctx, 0xB2, 0xF0, 0x12, 0x30);
dcs_write_seq(ctx, 0xE3, 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10);
dcs_write_seq(ctx, 0xC1, 0x54, 0x00, 0x1E, 0x1E, 0x77, 0xF1, 0xFF, 0xFF, 0xCC, 0xCC, 0x77, 0x77);
dcs_write_seq(ctx, 0xB5, 0x07, 0x07);
mdelay(100);
/* setvcom is different from our first data set*/
dcs_write_seq(ctx, ST7703_CMD_SETVCOM, 0x3F, 0x3F);
/* undocumented */
dcs_write_seq(ctx, 0xB6, 0x2F, 0x2F);
dcs_write_seq(ctx, 0xBF, 0x02, 0x11, 0x00);
dcs_write_seq(ctx, ST7703_CMD_SETGIP1, /* 63 */
0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12,
0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38,
0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00,
0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64,
0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
/* 39 parameters accordin to ST7703 docs */
dcs_write_seq(ctx, ST7703_CMD_SETGIP2, /* 61 */
0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13,
0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A,
0xA5, 0x00, 0x00, 0x00, 0x00);
dcs_write_seq(ctx, ST7703_CMD_SETGAMMA, /* 34 */
0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37,
0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11,
0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41,
0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10,
0x11, 0x18);
msleep(78); /* docs say nothing here */
dcs_write_seq(ctx, 0xE9, 0x82, 0x10, 0x06, 0x05, 0x9E, 0x0A, 0xA5, 0x12, 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC, 0x27, 0x38, 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x0C, 0x00, 0x03, 0x00, 0x00, 0x00, 0x75, 0x75, 0x31, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x13, 0x88, 0x64, 0x64, 0x20, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x02, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
dcs_write_seq(ctx, 0xEA, 0x02, 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x46, 0x02, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x64, 0x88, 0x13, 0x57, 0x13, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x75, 0x88, 0x23, 0x14, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0A, 0xA5, 0x00, 0x00, 0x00, 0x00);
dcs_write_seq(ctx, 0xE0, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11, 0x18, 0x00, 0x09, 0x0E, 0x29, 0x2D, 0x3C, 0x41, 0x37, 0x07, 0x0B, 0x0D, 0x10, 0x11, 0x0F, 0x10, 0x11, 0x18);
dcs_write_seq(ctx, 0x11, 0x00);
mdelay(120);
dcs_write_seq(ctx, 0x29, 0x00);
mdelay(20);
ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
if (ret < 0) {
......
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