1. 06 Jan, 2019 4 commits
  2. 05 Jan, 2019 4 commits
    • Christoph Hellwig's avatar
      ia64: fix compile without swiotlb · 3fed6ae4
      Christoph Hellwig authored
      Some non-generic ia64 configs don't build swiotlb, and thus should not
      pull in the generic non-coherent DMA infrastructure.
      
      Fixes: 68c60834 ("swiotlb: remove dma_mark_clean")
      Reported-by: default avatarTony Luck <tony.luck@gmail.com>
      Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      3fed6ae4
    • Linus Torvalds's avatar
      x86: re-introduce non-generic memcpy_{to,from}io · 170d13ca
      Linus Torvalds authored
      This has been broken forever, and nobody ever really noticed because
      it's purely a performance issue.
      
      Long long ago, in commit 6175ddf0 ("x86: Clean up mem*io functions")
      Brian Gerst simplified the memory copies to and from iomem, since on
      x86, the instructions to access iomem are exactly the same as the
      regular instructions.
      
      That is technically true, and things worked, and nobody said anything.
      Besides, back then the regular memcpy was pretty simple and worked fine.
      
      Nobody noticed except for David Laight, that is.  David has a testing a
      TLP monitor he was writing for an FPGA, and has been occasionally
      complaining about how memcpy_toio() writes things one byte at a time.
      
      Which is completely unacceptable from a performance standpoint, even if
      it happens to technically work.
      
      The reason it's writing one byte at a time is because while it's
      technically true that accesses to iomem are the same as accesses to
      regular memory on x86, the _granularity_ (and ordering) of accesses
      matter to iomem in ways that they don't matter to regular cached memory.
      
      In particular, when ERMS is set, we default to using "rep movsb" for
      larger memory copies.  That is indeed perfectly fine for real memory,
      since the whole point is that the CPU is going to do cacheline
      optimizations and executes the memory copy efficiently for cached
      memory.
      
      With iomem? Not so much.  With iomem, "rep movsb" will indeed work, but
      it will copy things one byte at a time. Slowly and ponderously.
      
      Now, originally, back in 2010 when commit 6175ddf0 was done, we
      didn't use ERMS, and this was much less noticeable.
      
      Our normal memcpy() was simpler in other ways too.
      
      Because in fact, it's not just about using the string instructions.  Our
      memcpy() these days does things like "read and write overlapping values"
      to handle the last bytes of the copy.  Again, for normal memory,
      overlapping accesses isn't an issue.  For iomem? It can be.
      
      So this re-introduces the specialized memcpy_toio(), memcpy_fromio() and
      memset_io() functions.  It doesn't particularly optimize them, but it
      tries to at least not be horrid, or do overlapping accesses.  In fact,
      this uses the existing __inline_memcpy() function that we still had
      lying around that uses our very traditional "rep movsl" loop followed by
      movsw/movsb for the final bytes.
      
      Somebody may decide to try to improve on it, but if we've gone almost a
      decade with only one person really ever noticing and complaining, maybe
      it's not worth worrying about further, once it's not _completely_ broken?
      Reported-by: default avatarDavid Laight <David.Laight@aculab.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      170d13ca
    • Linus Torvalds's avatar
      Use __put_user_goto in __put_user_size() and unsafe_put_user() · a959dc88
      Linus Torvalds authored
      This actually enables the __put_user_goto() functionality in
      unsafe_put_user().
      
      For an example of the effect of this, this is the code generated for the
      
              unsafe_put_user(signo, &infop->si_signo, Efault);
      
      in the waitid() system call:
      
      	movl %ecx,(%rbx)        # signo, MEM[(struct __large_struct *)_2]
      
      It's just one single store instruction, along with generating an
      exception table entry pointing to the Efault label case in case that
      instruction faults.
      
      Before, we would generate this:
      
      	xorl    %edx, %edx
      	movl %ecx,(%rbx)        # signo, MEM[(struct __large_struct *)_3]
              testl   %edx, %edx
              jne     .L309
      
      with the exception table generated for that 'mov' instruction causing us
      to jump to a stub that set %edx to -EFAULT and then jumped back to the
      'testl' instruction.
      
      So not only do we now get rid of the extra code in the normal sequence,
      we also avoid unnecessarily keeping that extra error register live
      across it all.
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      a959dc88
    • Linus Torvalds's avatar
      x86 uaccess: Introduce __put_user_goto · 4a789213
      Linus Torvalds authored
      This is finally the actual reason for the odd error handling in the
      "unsafe_get/put_user()" functions, introduced over three years ago.
      
      Using a "jump to error label" interface is somewhat odd, but very
      convenient as a programming interface, and more importantly, it fits
      very well with simply making the target be the exception handler address
      directly from the inline asm.
      
      The reason it took over three years to actually do this? We need "asm
      goto" support for it, which only became the default on x86 last year.
      It's now been a year that we've forced asm goto support (see commit
      e501ce95 "x86: Force asm-goto"), and so let's just do it here too.
      
      [ Side note: this commit was originally done back in 2016. The above
        commentary about timing is obviously about it only now getting merged
        into my real upstream tree     - Linus ]
      
      Sadly, gcc still only supports "asm goto" with asms that do not have any
      outputs, so we are limited to only the put_user case for this.  Maybe in
      several more years we can do the get_user case too.
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      4a789213
  3. 04 Jan, 2019 18 commits
  4. 03 Jan, 2019 3 commits
    • Yueyi Li's avatar
      arm64: kaslr: Reserve size of ARM64_MEMSTART_ALIGN in linear region · c8a43c18
      Yueyi Li authored
      When KASLR is enabled (CONFIG_RANDOMIZE_BASE=y), the top 4K of kernel
      virtual address space may be mapped to physical addresses despite being
      reserved for ERR_PTR values.
      
      Fix the randomization of the linear region so that we avoid mapping the
      last page of the virtual address space.
      
      Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarliyueyi <liyueyi@live.com>
      [will: rewrote commit message; merged in suggestion from Ard]
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      c8a43c18
    • Mark Rutland's avatar
      arm64: entry: remove unused register aliases · 8c2c596f
      Mark Rutland authored
      In commit:
      
        3b714275 ("arm64: convert native/compat syscall entry to C")
      
      ... we moved the syscall invocation code from assembly to C, but left
      behind a number of register aliases which are now unused.
      
      Let's remove them before they confuse someone.
      
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Reviewed-by: default avatarDave Martin <Dave.Martin@arm.com>
      Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      8c2c596f
    • Shaokun Zhang's avatar
      arm64: smp: Fix compilation error · 1236cd2b
      Shaokun Zhang authored
      For arm64: updates for 4.21, there is a compilation error:
      arch/arm64/kernel/head.S: Assembler messages:
      arch/arm64/kernel/head.S:824: Error: missing ')'
      arch/arm64/kernel/head.S:824: Error: missing ')'
      arch/arm64/kernel/head.S:824: Error: missing ')'
      arch/arm64/kernel/head.S:824: Error: unexpected characters following instruction at operand 2 -- `mov x2,#(2)|(2U<<(8))'
      scripts/Makefile.build:391: recipe for target 'arch/arm64/kernel/head.o' failed
      make[1]: *** [arch/arm64/kernel/head.o] Error 1
      GCC version is gcc (Ubuntu/Linaro 5.4.0-6ubuntu1~16.04.10) 5.4.0 20160609
      
      Let's fix it using the UL() macro.
      
      Fixes: 66f16a24 ("arm64: smp: Rework early feature mismatched detection")
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Tested-by: default avatarJohn Stultz <john.stultz@linaro.org>
      Signed-off-by: default avatarShaokun Zhang <zhangshaokun@hisilicon.com>
      [will: consistent use of UL() for all shifts in asm constants]
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      1236cd2b
  5. 02 Jan, 2019 2 commits
    • Aaro Koskinen's avatar
      MIPS: OCTEON: mark RGMII interface disabled on OCTEON III · edefae94
      Aaro Koskinen authored
      Commit 885872b7 ("MIPS: Octeon: Add Octeon III CN7xxx
      interface detection") added RGMII interface detection for OCTEON III,
      but it results in the following logs:
      
      [    7.165984] ERROR: Unsupported Octeon model in __cvmx_helper_rgmii_probe
      [    7.173017] ERROR: Unsupported Octeon model in __cvmx_helper_rgmii_probe
      
      The current RGMII routines are valid only for older OCTEONS that
      use GMX/ASX hardware blocks. On later chips AGL should be used,
      but support for that is missing in the mainline. Until that is added,
      mark the interface as disabled.
      
      Fixes: 885872b7 ("MIPS: Octeon: Add Octeon III CN7xxx interface detection")
      Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
      Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: stable@vger.kernel.org # 4.7+
      edefae94
    • Guo Ren's avatar
      csky: Add perf support for C-SKY · f50fd2d8
      Guo Ren authored
      This adds basic perf support for all C-SKY CPUs. Hardware events are
      only supported by 807/810/860.
      Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
      f50fd2d8
  6. 31 Dec, 2018 9 commits